Commit de7d480f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: make dpu hardware catalog static const 



Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/488166/
Link: https://lore.kernel.org/r/20220602202447.1755115-8-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 32084967

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+212 −267
Original line number Diff line number Diff line
@@ -1722,16 +1722,10 @@ static const struct dpu_perf_cfg qcm2290_perf_data = { 
	.bw_inefficiency_factor = 120,

};

/*************************************************************

 * Hardware catalog init

 * Hardware catalog

 *************************************************************/



/*

 * msm8998_cfg_init(): populate sdm845 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void msm8998_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg msm8998_dpu_cfg = {

	.caps = &msm8998_dpu_caps,

	.mdp_count = ARRAY_SIZE(msm8998_mdp),

	.mdp = msm8998_mdp,
@@ -1753,15 +1747,8 @@ static void msm8998_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &msm8998_perf_data,

	.mdss_irqs = IRQ_SM8250_MASK,

};

}



/*

 * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sdm845_dpu_cfg = {

	.caps = &sdm845_dpu_caps,

	.mdp_count = ARRAY_SIZE(sdm845_mdp),

	.mdp = sdm845_mdp,
@@ -1784,15 +1771,8 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sdm845_perf_data,

	.mdss_irqs = IRQ_SDM845_MASK,

};

}



/*

 * sc7180_cfg_init(): populate sc7180 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sc7180_dpu_cfg = {

	.caps = &sc7180_dpu_caps,

	.mdp_count = ARRAY_SIZE(sc7180_mdp),

	.mdp = sc7180_mdp,
@@ -1817,15 +1797,8 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sc7180_perf_data,

	.mdss_irqs = IRQ_SC7180_MASK,

};

}



/*

 * sm8150_cfg_init(): populate sm8150 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sm8150_dpu_cfg = {

	.caps = &sm8150_dpu_caps,

	.mdp_count = ARRAY_SIZE(sdm845_mdp),

	.mdp = sdm845_mdp,
@@ -1850,15 +1823,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sm8150_perf_data,

	.mdss_irqs = IRQ_SDM845_MASK,

};

}



/*

 * sc8180x_cfg_init(): populate sc8180 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sc8180x_dpu_cfg = {

	.caps = &sc8180x_dpu_caps,

	.mdp_count = ARRAY_SIZE(sc8180x_mdp),

	.mdp = sc8180x_mdp,
@@ -1881,15 +1847,8 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sc8180x_perf_data,

	.mdss_irqs = IRQ_SC8180X_MASK,

};

}



/*

 * sm8250_cfg_init(): populate sm8250 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sm8250_dpu_cfg = {

	.caps = &sm8250_dpu_caps,

	.mdp_count = ARRAY_SIZE(sm8250_mdp),

	.mdp = sm8250_mdp,
@@ -1916,11 +1875,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sm8250_perf_data,

	.mdss_irqs = IRQ_SM8250_MASK,

};

}



static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg sc7280_dpu_cfg = {

	.caps = &sc7280_dpu_caps,

	.mdp_count = ARRAY_SIZE(sc7280_mdp),

	.mdp = sc7280_mdp,
@@ -1939,16 +1895,8 @@ static void sc7280_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &sc7280_perf_data,

	.mdss_irqs = IRQ_SC7280_MASK,

};

}





/*

 * qcm2290_cfg_init(): populate qcm2290 dpu sub-blocks reg offsets

 * and instance counts.

 */

static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg)

{

	*dpu_cfg = (struct dpu_mdss_cfg){

static const struct dpu_mdss_cfg qcm2290_dpu_cfg = {

	.caps = &qcm2290_dpu_caps,

	.mdp_count = ARRAY_SIZE(qcm2290_mdp),

	.mdp = qcm2290_mdp,
@@ -1971,36 +1919,33 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
	.perf = &qcm2290_perf_data,

	.mdss_irqs = IRQ_SC7180_MASK,

};

}



static const struct dpu_mdss_hw_cfg_handler cfg_handler[] = {

	{ .hw_rev = DPU_HW_VER_300, .cfg_init = msm8998_cfg_init},

	{ .hw_rev = DPU_HW_VER_301, .cfg_init = msm8998_cfg_init},

	{ .hw_rev = DPU_HW_VER_400, .cfg_init = sdm845_cfg_init},

	{ .hw_rev = DPU_HW_VER_401, .cfg_init = sdm845_cfg_init},

	{ .hw_rev = DPU_HW_VER_500, .cfg_init = sm8150_cfg_init},

	{ .hw_rev = DPU_HW_VER_501, .cfg_init = sm8150_cfg_init},

	{ .hw_rev = DPU_HW_VER_510, .cfg_init = sc8180x_cfg_init},

	{ .hw_rev = DPU_HW_VER_600, .cfg_init = sm8250_cfg_init},

	{ .hw_rev = DPU_HW_VER_620, .cfg_init = sc7180_cfg_init},

	{ .hw_rev = DPU_HW_VER_650, .cfg_init = qcm2290_cfg_init},

	{ .hw_rev = DPU_HW_VER_720, .cfg_init = sc7280_cfg_init},

};



const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev)

	{ .hw_rev = DPU_HW_VER_300, .dpu_cfg = &msm8998_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_301, .dpu_cfg = &msm8998_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_400, .dpu_cfg = &sdm845_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_401, .dpu_cfg = &sdm845_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_500, .dpu_cfg = &sm8150_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_501, .dpu_cfg = &sm8150_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_510, .dpu_cfg = &sc8180x_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_600, .dpu_cfg = &sm8250_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_620, .dpu_cfg = &sc7180_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_650, .dpu_cfg = &qcm2290_dpu_cfg},

	{ .hw_rev = DPU_HW_VER_720, .dpu_cfg = &sc7280_dpu_cfg},

};



const struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)

{

	int i;

	struct dpu_mdss_cfg *dpu_cfg;



	dpu_cfg = devm_kzalloc(dev, sizeof(*dpu_cfg), GFP_KERNEL);

	dpu_cfg = kzalloc(sizeof(*dpu_cfg), GFP_KERNEL);

	if (!dpu_cfg)

		return ERR_PTR(-ENOMEM);



	for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) {

		if (cfg_handler[i].hw_rev == hw_rev) {

			cfg_handler[i].cfg_init(dpu_cfg);

			return dpu_cfg;

		}

		if (cfg_handler[i].hw_rev == hw_rev)

			return cfg_handler[i].dpu_cfg;

	}



	DPU_ERROR("unsupported chipset id:%X\n", hw_rev);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+2 −3
Original line number Diff line number Diff line
@@ -878,17 +878,16 @@ struct dpu_mdss_cfg { 


struct dpu_mdss_hw_cfg_handler {

	u32 hw_rev;

	void (*cfg_init)(struct dpu_mdss_cfg *dpu_cfg);

	const struct dpu_mdss_cfg *dpu_cfg;

};



/**

 * dpu_hw_catalog_init - dpu hardware catalog init API retrieves

 * hardcoded target specific catalog information in config structure

 * @dev:          DPU device

 * @hw_rev:       caller needs provide the hardware revision.

 *

 * Return: dpu config structure

 */

const struct dpu_mdss_cfg *dpu_hw_catalog_init(struct device *dev, u32 hw_rev);

const struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);



#endif /* _DPU_HW_CATALOG_H */

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

+1 −1
Original line number Diff line number Diff line
@@ -1093,7 +1093,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) 


	pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);



	dpu_kms->catalog = dpu_hw_catalog_init(dev->dev, dpu_kms->core_rev);

	dpu_kms->catalog = dpu_hw_catalog_init(dpu_kms->core_rev);

	if (IS_ERR_OR_NULL(dpu_kms->catalog)) {

		rc = PTR_ERR(dpu_kms->catalog);

		if (!dpu_kms->catalog)