Commit e1a297a6 authored by Robert Foss's avatar Robert Foss Committed by Bjorn Andersson
Browse files

clk: qcom: dispcc-sm8250: Add RETAIN_FF_ENABLE flag for mdss_gdsc 



All SoC supported by this driver supports the RETAIN_FF_ENABLE flag,
so it should be enabled here.

This feature enables registers to maintain their state after
dis/re-enabling the GDSC.

Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-3-robert.foss@linaro.org
parent b5f84650

drivers/clk/qcom/dispcc-sm8250.c

+1 −1
Original line number Diff line number Diff line
@@ -1137,7 +1137,7 @@ static struct gdsc mdss_gdsc = { 
		.name = "mdss_gdsc",

	},

	.pwrsts = PWRSTS_OFF_ON,

	.flags = HW_CTRL,

	.flags = HW_CTRL | RETAIN_FF_ENABLE,

};



static struct clk_regmap *disp_cc_sm8250_clocks[] = {