Loading arch/arm/boot/dts/dra7xx-clocks.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1856,7 +1856,7 @@ mcasp7_aux_gfclk_mux: mcasp7_aux_gfclk_mux@1908 { reg = <0x1908>; }; mcasp8_ahclk_mux: mcasp8_ahclk_mux@1890 { mcasp8_ahclkx_mux: mcasp8_ahclkx_mux@1890 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; Loading drivers/clk/ti/clk-7xx.c +1 −1 Original line number Diff line number Diff line Loading @@ -223,7 +223,7 @@ static struct ti_dt_clk dra7xx_clks[] = { DT_CLK(NULL, "mcasp6_aux_gfclk_mux", "mcasp6_aux_gfclk_mux"), DT_CLK(NULL, "mcasp7_ahclkx_mux", "mcasp7_ahclkx_mux"), DT_CLK(NULL, "mcasp7_aux_gfclk_mux", "mcasp7_aux_gfclk_mux"), DT_CLK(NULL, "mcasp8_ahclk_mux", "mcasp8_ahclk_mux"), DT_CLK(NULL, "mcasp8_ahclkx_mux", "mcasp8_ahclkx_mux"), DT_CLK(NULL, "mcasp8_aux_gfclk_mux", "mcasp8_aux_gfclk_mux"), DT_CLK(NULL, "mmc1_fclk_mux", "mmc1_fclk_mux"), DT_CLK(NULL, "mmc1_fclk_div", "mmc1_fclk_div"), Loading Loading
arch/arm/boot/dts/dra7xx-clocks.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1856,7 +1856,7 @@ mcasp7_aux_gfclk_mux: mcasp7_aux_gfclk_mux@1908 { reg = <0x1908>; }; mcasp8_ahclk_mux: mcasp8_ahclk_mux@1890 { mcasp8_ahclkx_mux: mcasp8_ahclkx_mux@1890 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; Loading
drivers/clk/ti/clk-7xx.c +1 −1 Original line number Diff line number Diff line Loading @@ -223,7 +223,7 @@ static struct ti_dt_clk dra7xx_clks[] = { DT_CLK(NULL, "mcasp6_aux_gfclk_mux", "mcasp6_aux_gfclk_mux"), DT_CLK(NULL, "mcasp7_ahclkx_mux", "mcasp7_ahclkx_mux"), DT_CLK(NULL, "mcasp7_aux_gfclk_mux", "mcasp7_aux_gfclk_mux"), DT_CLK(NULL, "mcasp8_ahclk_mux", "mcasp8_ahclk_mux"), DT_CLK(NULL, "mcasp8_ahclkx_mux", "mcasp8_ahclkx_mux"), DT_CLK(NULL, "mcasp8_aux_gfclk_mux", "mcasp8_aux_gfclk_mux"), DT_CLK(NULL, "mmc1_fclk_mux", "mmc1_fclk_mux"), DT_CLK(NULL, "mmc1_fclk_div", "mmc1_fclk_div"), Loading