Commit e5aac225 authored by Allen-KH Cheng's avatar Allen-KH Cheng Committed by Matthias Brugger
Browse files

arm64: dts: mt8192: Add xhci node 



Add xhci node for mt8192 SoC.

Signed-off-by: default avatarAllen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-7-allen-kh.cheng@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 40de66b8

arch/arm64/boot/dts/mediatek/mt8192.dtsi

+24 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/pinctrl/mt8192-pinfunc.h>

#include <dt-bindings/phy/phy.h>

#include <dt-bindings/power/mt8192-power.h>



/ {
@@ -691,6 +692,29 @@ scp: scp@10500000 { 
			status = "disabled";

		};



		xhci: usb@11200000 {

			compatible = "mediatek,mt8192-xhci",

				     "mediatek,mtk-xhci";

			reg = <0 0x11200000 0 0x1000>,

			      <0 0x11203e00 0 0x0100>;

			reg-names = "mac", "ippc";

			interrupts-extended = <&gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;

			interrupt-names = "host";

			phys = <&u2port0 PHY_TYPE_USB2>,

			       <&u3port0 PHY_TYPE_USB3>;

			assigned-clocks = <&topckgen CLK_TOP_USB_TOP_SEL>,

					  <&topckgen CLK_TOP_SSUSB_XHCI_SEL>;

			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,

						 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;

			clocks = <&infracfg CLK_INFRA_SSUSB>,

				 <&infracfg CLK_INFRA_SSUSB_XHCI>,

				 <&apmixedsys CLK_APMIXED_USBPLL>;

			clock-names = "sys_ck", "xhci_ck", "ref_ck";

			wakeup-source;

			mediatek,syscon-wakeup = <&pericfg 0x420 102>;

			status = "disabled";

		};



		nor_flash: spi@11234000 {

			compatible = "mediatek,mt8192-nor";

			reg = <0 0x11234000 0 0xe0>;