Commit e5fc2b99 authored by Yu Tu's avatar Yu Tu Committed by Greg Kroah-Hartman
Browse files

tty: serial: meson: Make some bit of the REG5 register writable 



Make the internal clock source mux and divider writeable, allowing the
uart to deviate from the settings intially applied by the ROMCode and
using the most appropriate clocks.

Signed-off-by: default avatarYu Tu <yu.tu@amlogic.com>
Link: https://lore.kernel.org/r/20220225073922.3947-5-yu.tu@amlogic.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 44023b8e

drivers/tty/serial/meson_uart.c

+2 −2
Original line number Diff line number Diff line
@@ -686,7 +686,7 @@ static int meson_uart_probe_clocks(struct uart_port *port) 
						CLK_SET_RATE_NO_REPARENT,

						port->membase + AML_UART_REG5,

						26, 2,

						CLK_DIVIDER_READ_ONLY,

						CLK_DIVIDER_ROUND_CLOSEST,

						xtal_div_table, NULL);

	if (IS_ERR(hw))

		return PTR_ERR(hw);
@@ -708,7 +708,7 @@ static int meson_uart_probe_clocks(struct uart_port *port) 
					CLK_SET_RATE_PARENT,

					port->membase + AML_UART_REG5,

					24, 0x1,

					CLK_MUX_READ_ONLY,

					CLK_MUX_ROUND_CLOSEST,

					&use_xtal_mux_table, NULL);



	if (IS_ERR(hw))