Commit e6bd81a2 authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Masahiro Yamada
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arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy 



This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.

Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent dcd54fa8

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -936,7 +936,9 @@ pcie_phy: phy@66038000 { 
			compatible = "socionext,uniphier-ld20-pcie-phy";

			reg = <0x66038000 0x4000>;

			#phy-cells = <0>;

			clock-names = "link";

			clocks = <&sys_clk 24>;

			reset-names = "link";

			resets = <&sys_rst 24>;

			socionext,syscon = <&soc_glue>;

		};

arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -833,7 +833,9 @@ pcie_phy: phy@66038000 { 
			compatible = "socionext,uniphier-pxs3-pcie-phy";

			reg = <0x66038000 0x4000>;

			#phy-cells = <0>;

			clock-names = "link";

			clocks = <&sys_clk 24>;

			reset-names = "link";

			resets = <&sys_rst 24>;

			socionext,syscon = <&soc_glue>;

		};