Commit e8a87efd authored Nov 03, 2022 by Bob Pearson Committed by Jason Gunthorpe Nov 10, 2022

RDMA/rxe: Replace pr_xxx by rxe_dbg_xxx in rxe_mw.c

Replace calls to pr_xxx() int rxe_mw.c with rxe_dbg_xxx().

Link: https://lore.kernel.org/r/20221103171013.20659-6-rpearsonhpe@gmail.com


Signed-off-by: Bob Pearson <rpearsonhpe@gmail.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

parent 2778b72b

drivers/infiniband/sw/rxe/rxe_mw.c

+10 −10

Original line number	Diff line number	Diff line
		@@ -52,14 +52,14 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		{
		if (mw->ibmw.type == IB_MW_TYPE_1) {
		if (unlikely(mw->state != RXE_MW_STATE_VALID)) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind a type 1 MW not in the valid state\n");
		return -EINVAL;
		}

		/* o10-36.2.2 */
		if (unlikely((mw->access & IB_ZERO_BASED))) {
		pr_err_once("attempt to bind a zero based type 1 MW\n");
		rxe_dbg_mw(mw, "attempt to bind a zero based type 1 MW\n");
		return -EINVAL;
		}
		}
		@@ -67,21 +67,21 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		if (mw->ibmw.type == IB_MW_TYPE_2) {
		/* o10-37.2.30 */
		if (unlikely(mw->state != RXE_MW_STATE_FREE)) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind a type 2 MW not in the free state\n");
		return -EINVAL;
		}

		/* C10-72 */
		if (unlikely(qp->pd != to_rpd(mw->ibmw.pd))) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind type 2 MW with qp with different PD\n");
		return -EINVAL;
		}

		/* o10-37.2.40 */
		if (unlikely(!mr \|\| wqe->wr.wr.mw.length == 0)) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to invalidate type 2 MW by binding with NULL or zero length MR\n");
		return -EINVAL;
		}
		@@ -92,13 +92,13 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		return 0;

		if (unlikely(mr->access & IB_ZERO_BASED)) {
		pr_err_once("attempt to bind MW to zero based MR\n");
		rxe_dbg_mw(mw, "attempt to bind MW to zero based MR\n");
		return -EINVAL;
		}

		/* C10-73 */
		if (unlikely(!(mr->access & IB_ACCESS_MW_BIND))) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind an MW to an MR without bind access\n");
		return -EINVAL;
		}
		@@ -107,7 +107,7 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		if (unlikely((mw->access &
		(IB_ACCESS_REMOTE_WRITE \| IB_ACCESS_REMOTE_ATOMIC)) &&
		!(mr->access & IB_ACCESS_LOCAL_WRITE))) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind an Writable MW to an MR without local write access\n");
		return -EINVAL;
		}
		@@ -115,7 +115,7 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		/* C10-75 */
		if (mw->access & IB_ZERO_BASED) {
		if (unlikely(wqe->wr.wr.mw.length > mr->ibmr.length)) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind a ZB MW outside of the MR\n");
		return -EINVAL;
		}
		@@ -123,7 +123,7 @@ static int rxe_check_bind_mw(struct rxe_qp qp, struct rxe_send_wqe wqe,
		if (unlikely((wqe->wr.wr.mw.addr < mr->ibmr.iova) \|\|
		((wqe->wr.wr.mw.addr + wqe->wr.wr.mw.length) >
		(mr->ibmr.iova + mr->ibmr.length)))) {
		pr_err_once(
		rxe_dbg_mw(mw,
		"attempt to bind a VA MW outside of the MR\n");
		return -EINVAL;
		}