Loading drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct nvkm_falcon_func { void (*init)(struct nvkm_falcon *); void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); u32 debug; u32 fbif; void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool); Loading drivers/gpu/drm/nouveau/nvkm/engine/nvdec/gm107.c +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ static const struct nvkm_falcon_func gm107_nvdec_flcn = { .debug = 0xd00, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c +1 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ gp102_sec2_flcn_bind_context(struct nvkm_falcon *falcon, static const struct nvkm_falcon_func gp102_sec2_flcn = { .debug = 0x408, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ static const struct nvkm_falcon_func tu102_sec2_flcn = { .debug = 0x408, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading drivers/gpu/drm/nouveau/nvkm/falcon/base.c +3 −26 Original line number Diff line number Diff line Loading @@ -138,8 +138,8 @@ nvkm_falcon_clear_interrupt(struct nvkm_falcon *falcon, u32 mask) static int nvkm_falcon_oneinit(struct nvkm_falcon *falcon) { const struct nvkm_falcon_func *func = falcon->func; const struct nvkm_subdev *subdev = falcon->owner; u32 debug_reg; u32 reg; if (!falcon->addr) { Loading @@ -158,31 +158,8 @@ nvkm_falcon_oneinit(struct nvkm_falcon *falcon) falcon->code.limit = (reg & 0x1ff) << 8; falcon->data.limit = (reg & 0x3fe00) >> 1; switch (subdev->index) { case NVKM_ENGINE_GR: debug_reg = 0x0; break; case NVKM_SUBDEV_PMU: debug_reg = 0xc08; break; case NVKM_ENGINE_NVDEC0: debug_reg = 0xd00; break; case NVKM_ENGINE_SEC2: debug_reg = 0x408; break; case NVKM_SUBDEV_GSP: debug_reg = 0x0; /*XXX*/ break; default: nvkm_warn(subdev, "unsupported falcon %s!\n", nvkm_subdev_name[subdev->index]); debug_reg = 0; break; } if (debug_reg) { u32 val = nvkm_falcon_rd32(falcon, debug_reg); if (func->debug) { u32 val = nvkm_falcon_rd32(falcon, func->debug); falcon->debug = (val >> 20) & 0x1; } Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct nvkm_falcon_func { void (*init)(struct nvkm_falcon *); void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); u32 debug; u32 fbif; void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool); Loading
drivers/gpu/drm/nouveau/nvkm/engine/nvdec/gm107.c +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ static const struct nvkm_falcon_func gm107_nvdec_flcn = { .debug = 0xd00, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading
drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c +1 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ gp102_sec2_flcn_bind_context(struct nvkm_falcon *falcon, static const struct nvkm_falcon_func gp102_sec2_flcn = { .debug = 0x408, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading
drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ static const struct nvkm_falcon_func tu102_sec2_flcn = { .debug = 0x408, .fbif = 0x600, .load_imem = nvkm_falcon_v1_load_imem, .load_dmem = nvkm_falcon_v1_load_dmem, Loading
drivers/gpu/drm/nouveau/nvkm/falcon/base.c +3 −26 Original line number Diff line number Diff line Loading @@ -138,8 +138,8 @@ nvkm_falcon_clear_interrupt(struct nvkm_falcon *falcon, u32 mask) static int nvkm_falcon_oneinit(struct nvkm_falcon *falcon) { const struct nvkm_falcon_func *func = falcon->func; const struct nvkm_subdev *subdev = falcon->owner; u32 debug_reg; u32 reg; if (!falcon->addr) { Loading @@ -158,31 +158,8 @@ nvkm_falcon_oneinit(struct nvkm_falcon *falcon) falcon->code.limit = (reg & 0x1ff) << 8; falcon->data.limit = (reg & 0x3fe00) >> 1; switch (subdev->index) { case NVKM_ENGINE_GR: debug_reg = 0x0; break; case NVKM_SUBDEV_PMU: debug_reg = 0xc08; break; case NVKM_ENGINE_NVDEC0: debug_reg = 0xd00; break; case NVKM_ENGINE_SEC2: debug_reg = 0x408; break; case NVKM_SUBDEV_GSP: debug_reg = 0x0; /*XXX*/ break; default: nvkm_warn(subdev, "unsupported falcon %s!\n", nvkm_subdev_name[subdev->index]); debug_reg = 0; break; } if (debug_reg) { u32 val = nvkm_falcon_rd32(falcon, debug_reg); if (func->debug) { u32 val = nvkm_falcon_rd32(falcon, func->debug); falcon->debug = (val >> 20) & 0x1; } Loading