Commit e9c58bb4 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: remove clocks_state enum 



Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 95015be8

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+2 −2
Original line number Diff line number Diff line
@@ -1221,9 +1221,9 @@ static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx) 


	if (link_settings.link_rate == max_link_rate) {

		if (pipe_ctx->dis_clk->funcs->set_min_clocks_state) {

			if (pipe_ctx->dis_clk->cur_min_clks_state < CLOCKS_STATE_NOMINAL)

			if (pipe_ctx->dis_clk->cur_min_clks_state < DM_PP_CLOCKS_STATE_NOMINAL)

				pipe_ctx->dis_clk->funcs->set_min_clocks_state(

					pipe_ctx->dis_clk, CLOCKS_STATE_NOMINAL);

					pipe_ctx->dis_clk, DM_PP_CLOCKS_STATE_NOMINAL);

		} else {

		}

	}

drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c

+1 −2
Original line number Diff line number Diff line
@@ -983,8 +983,7 @@ static bool construct( 
	 */

	if (dm_pp_get_static_clocks(ctx, &static_clk_info))

		pool->base.display_clock->max_clks_state =

			dce110_resource_convert_clock_state_pp_to_dc(

					static_clk_info.max_clocks_state);

					static_clk_info.max_clocks_state;

	{

		struct irq_service_init_data init_data;

		init_data.ctx = dc->ctx;

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+2 −2
Original line number Diff line number Diff line
@@ -1084,7 +1084,7 @@ static uint32_t get_max_pixel_clock_for_all_paths( 
static void apply_min_clocks(

	struct core_dc *dc,

	struct validate_context *context,

	enum clocks_state *clocks_state,

	enum dm_pp_clocks_state *clocks_state,

	bool pre_mode_set)

{

	struct state_dependent_clocks req_clocks = {0};
@@ -1193,7 +1193,7 @@ enum dc_status dce110_apply_ctx_to_hw( 
	enum dc_status status;

	int i;

	bool programmed_audio_dto = false;

	enum clocks_state clocks_state = CLOCKS_STATE_INVALID;

	enum dm_pp_clocks_state clocks_state = DM_PP_CLOCKS_STATE_INVALID;



	/* Reset old context */

	/* look up the targets that have been removed since last commit */

drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c

+1 −43
Original line number Diff line number Diff line
@@ -1188,47 +1188,6 @@ static void bw_calcs_data_update_from_pplib(struct core_dc *dc) 
		1000);

}



enum clocks_state dce110_resource_convert_clock_state_pp_to_dc(

	enum dm_pp_clocks_state pp_clock_state)

{

	enum clocks_state dc_clocks_state = CLOCKS_STATE_INVALID;



	switch (pp_clock_state) {

	case DM_PP_CLOCKS_STATE_INVALID:

		dc_clocks_state = CLOCKS_STATE_INVALID;

		break;

	case DM_PP_CLOCKS_STATE_ULTRA_LOW:

		dc_clocks_state = CLOCKS_STATE_ULTRA_LOW;

		break;

	case DM_PP_CLOCKS_STATE_LOW:

		dc_clocks_state = CLOCKS_STATE_LOW;

		break;

	case DM_PP_CLOCKS_STATE_NOMINAL:

		dc_clocks_state = CLOCKS_STATE_NOMINAL;

		break;

	case DM_PP_CLOCKS_STATE_PERFORMANCE:

		dc_clocks_state = CLOCKS_STATE_PERFORMANCE;

		break;

	case DM_PP_CLOCKS_DPM_STATE_LEVEL_4:

		dc_clocks_state = CLOCKS_DPM_STATE_LEVEL_4;

		break;

	case DM_PP_CLOCKS_DPM_STATE_LEVEL_5:

		dc_clocks_state = CLOCKS_DPM_STATE_LEVEL_5;

		break;

	case DM_PP_CLOCKS_DPM_STATE_LEVEL_6:

		dc_clocks_state = CLOCKS_DPM_STATE_LEVEL_6;

		break;

	case DM_PP_CLOCKS_DPM_STATE_LEVEL_7:

		dc_clocks_state = CLOCKS_DPM_STATE_LEVEL_7;

		break;

	default:

		dc_clocks_state = CLOCKS_STATE_INVALID;

		break;

	}



	return dc_clocks_state;

}



const struct resource_caps *dce110_resource_cap(

	struct hw_asic_id *asic_id)

{
@@ -1314,8 +1273,7 @@ static bool construct( 
	 */

	if (dm_pp_get_static_clocks(ctx, &static_clk_info))

		pool->base.display_clock->max_clks_state =

			dce110_resource_convert_clock_state_pp_to_dc(

					static_clk_info.max_clocks_state);

				static_clk_info.max_clocks_state;



	{

		struct irq_service_init_data init_data;

drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.h

+0 −3
Original line number Diff line number Diff line
@@ -40,9 +40,6 @@ struct dce110_resource_pool { 


enum dc_status dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx);



enum clocks_state dce110_resource_convert_clock_state_pp_to_dc(

	enum dm_pp_clocks_state pp_clock_state);



void dce110_resource_build_bit_depth_reduction_params(

		const struct core_stream *stream,

		struct bit_depth_reduction_params *fmt_bit_depth);