Commit ea69dbb8 authored by James Clark's avatar James Clark Committed by Mathieu Poirier
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coresight: etm4x: Cleanup TRCIDR4 register accesses 



This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.

Signed-off-by: default avatarJames Clark <james.clark@arm.com>
Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-5-james.clark@arm.com


Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent f4d1f214

drivers/hwtracing/coresight/coresight-etm4x-core.c

+6 −6
Original line number Diff line number Diff line
@@ -1155,9 +1155,9 @@ static void etm4_init_arch_data(void *info) 
	/* number of resources trace unit supports */

	etmidr4 = etm4x_relaxed_read32(csa, TRCIDR4);

	/* NUMACPAIRS, bits[0:3] number of addr comparator pairs for tracing */

	drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);

	drvdata->nr_addr_cmp = FIELD_GET(TRCIDR4_NUMACPAIRS_MASK, etmidr4);

	/* NUMPC, bits[15:12] number of PE comparator inputs for tracing */

	drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);

	drvdata->nr_pe_cmp = FIELD_GET(TRCIDR4_NUMPC_MASK, etmidr4);

	/*

	 * NUMRSPAIR, bits[19:16]

	 * The number of resource pairs conveyed by the HW starts at 0, i.e a
@@ -1168,7 +1168,7 @@ static void etm4_init_arch_data(void *info) 
	 * the default TRUE and FALSE resource selectors are omitted.

	 * Otherwise for values 0x1 and above the number is N + 1 as per v4.2.

	 */

	drvdata->nr_resource = BMVAL(etmidr4, 16, 19);

	drvdata->nr_resource = FIELD_GET(TRCIDR4_NUMRSPAIR_MASK, etmidr4);

	if ((drvdata->arch < ETM_ARCH_V4_3) || (drvdata->nr_resource > 0))

		drvdata->nr_resource += 1;

	/*
@@ -1176,15 +1176,15 @@ static void etm4_init_arch_data(void *info) 
	 * comparator control for tracing. Read any status regs as these

	 * also contain RO capability data.

	 */

	drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23);

	drvdata->nr_ss_cmp = FIELD_GET(TRCIDR4_NUMSSCC_MASK, etmidr4);

	for (i = 0; i < drvdata->nr_ss_cmp; i++) {

		drvdata->config.ss_status[i] =

			etm4x_relaxed_read32(csa, TRCSSCSRn(i));

	}

	/* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */

	drvdata->numcidc = BMVAL(etmidr4, 24, 27);

	drvdata->numcidc = FIELD_GET(TRCIDR4_NUMCIDC_MASK, etmidr4);

	/* NUMVMIDC, bits[31:28] number of VMID comparators for tracing */

	drvdata->numvmidc = BMVAL(etmidr4, 28, 31);

	drvdata->numvmidc = FIELD_GET(TRCIDR4_NUMVMIDC_MASK, etmidr4);



	etmidr5 = etm4x_relaxed_read32(csa, TRCIDR5);

	/* NUMEXTIN, bits[8:0] number of external inputs implemented */

drivers/hwtracing/coresight/coresight-etm4x.h

+8 −0
Original line number Diff line number Diff line
@@ -157,6 +157,14 @@ 
#define TRCIDR3_NUMPROC_LO_MASK			GENMASK(30, 28)

#define TRCIDR3_NUMPROC_HI_MASK			GENMASK(13, 12)

#define TRCIDR3_NOOVERFLOW			BIT(31)



#define TRCIDR4_NUMACPAIRS_MASK			GENMASK(3, 0)

#define TRCIDR4_NUMPC_MASK			GENMASK(15, 12)

#define TRCIDR4_NUMRSPAIR_MASK			GENMASK(19, 16)

#define TRCIDR4_NUMSSCC_MASK			GENMASK(23, 20)

#define TRCIDR4_NUMCIDC_MASK			GENMASK(27, 24)

#define TRCIDR4_NUMVMIDC_MASK			GENMASK(31, 28)



/*

 * System instructions to access ETM registers.

 * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions