Loading arch/sh/kernel/sh_ksyms.c +0 −1 Original line number Diff line number Diff line Loading @@ -105,7 +105,6 @@ EXPORT_SYMBOL(__flush_purge_region); EXPORT_SYMBOL(clear_user_page); #endif EXPORT_SYMBOL(flush_tlb_page); EXPORT_SYMBOL(__down_trylock); #ifdef CONFIG_SMP Loading arch/sh/mm/init.c +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); __flush_tlb_page(get_asid(), addr); flush_tlb_one(get_asid(), addr); } /* Loading arch/sh/mm/pg-sh4.c +2 −2 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); flush_tlb_one(get_asid(), p3_addr); local_irq_restore(flags); update_mmu_cache(NULL, p3_addr, entry); __clear_user_page((void *)p3_addr, to); Loading Loading @@ -74,7 +74,7 @@ void copy_user_page(void *to, void *from, unsigned long address, mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); flush_tlb_one(get_asid(), p3_addr); local_irq_restore(flags); update_mmu_cache(NULL, p3_addr, entry); __copy_user_page((void *)p3_addr, from, to); Loading arch/sh/mm/tlb-flush.c +10 −10 Original line number Diff line number Diff line Loading @@ -14,7 +14,7 @@ #include <asm/tlbflush.h> #include <asm/cacheflush.h> void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { unsigned int cpu = smp_processor_id(); Loading @@ -31,14 +31,14 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) saved_asid = get_asid(); set_asid(asid); } __flush_tlb_page(asid, page); flush_tlb_one(asid, page); if (saved_asid != MMU_NO_ASID) set_asid(saved_asid); local_irq_restore(flags); } } void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { struct mm_struct *mm = vma->vm_mm; Loading Loading @@ -67,7 +67,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, set_asid(asid); } while (start < end) { __flush_tlb_page(asid, start); flush_tlb_one(asid, start); start += PAGE_SIZE; } if (saved_asid != MMU_NO_ASID) Loading @@ -77,7 +77,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, } } void flush_tlb_kernel_range(unsigned long start, unsigned long end) void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { unsigned int cpu = smp_processor_id(); unsigned long flags; Loading @@ -86,7 +86,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) local_irq_save(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ flush_tlb_all(); local_flush_tlb_all(); } else { unsigned long asid; unsigned long saved_asid = get_asid(); Loading @@ -97,7 +97,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) end &= PAGE_MASK; set_asid(asid); while (start < end) { __flush_tlb_page(asid, start); flush_tlb_one(asid, start); start += PAGE_SIZE; } set_asid(saved_asid); Loading @@ -105,7 +105,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) local_irq_restore(flags); } void flush_tlb_mm(struct mm_struct *mm) void local_flush_tlb_mm(struct mm_struct *mm) { unsigned int cpu = smp_processor_id(); Loading @@ -122,7 +122,7 @@ void flush_tlb_mm(struct mm_struct *mm) } } void flush_tlb_all(void) void local_flush_tlb_all(void) { unsigned long flags, status; Loading arch/sh/mm/tlb-nommu.c +6 −13 Original line number Diff line number Diff line Loading @@ -13,39 +13,33 @@ /* * Nothing too terribly exciting here .. */ void flush_tlb(void) { BUG(); } void flush_tlb_all(void) void local_flush_tlb_all(void) { BUG(); } void flush_tlb_mm(struct mm_struct *mm) void local_flush_tlb_mm(struct mm_struct *mm) { BUG(); } void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { BUG(); } void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { BUG(); } void __flush_tlb_page(unsigned long asid, unsigned long page) void local_flush_tlb_one(unsigned long asid, unsigned long page) { BUG(); } void flush_tlb_kernel_range(unsigned long start, unsigned long end) void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { BUG(); } Loading @@ -55,4 +49,3 @@ void update_mmu_cache(struct vm_area_struct * vma, { BUG(); } Loading
arch/sh/kernel/sh_ksyms.c +0 −1 Original line number Diff line number Diff line Loading @@ -105,7 +105,6 @@ EXPORT_SYMBOL(__flush_purge_region); EXPORT_SYMBOL(clear_user_page); #endif EXPORT_SYMBOL(flush_tlb_page); EXPORT_SYMBOL(__down_trylock); #ifdef CONFIG_SMP Loading
arch/sh/mm/init.c +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); __flush_tlb_page(get_asid(), addr); flush_tlb_one(get_asid(), addr); } /* Loading
arch/sh/mm/pg-sh4.c +2 −2 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); flush_tlb_one(get_asid(), p3_addr); local_irq_restore(flags); update_mmu_cache(NULL, p3_addr, entry); __clear_user_page((void *)p3_addr, to); Loading Loading @@ -74,7 +74,7 @@ void copy_user_page(void *to, void *from, unsigned long address, mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); flush_tlb_one(get_asid(), p3_addr); local_irq_restore(flags); update_mmu_cache(NULL, p3_addr, entry); __copy_user_page((void *)p3_addr, from, to); Loading
arch/sh/mm/tlb-flush.c +10 −10 Original line number Diff line number Diff line Loading @@ -14,7 +14,7 @@ #include <asm/tlbflush.h> #include <asm/cacheflush.h> void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { unsigned int cpu = smp_processor_id(); Loading @@ -31,14 +31,14 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) saved_asid = get_asid(); set_asid(asid); } __flush_tlb_page(asid, page); flush_tlb_one(asid, page); if (saved_asid != MMU_NO_ASID) set_asid(saved_asid); local_irq_restore(flags); } } void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { struct mm_struct *mm = vma->vm_mm; Loading Loading @@ -67,7 +67,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, set_asid(asid); } while (start < end) { __flush_tlb_page(asid, start); flush_tlb_one(asid, start); start += PAGE_SIZE; } if (saved_asid != MMU_NO_ASID) Loading @@ -77,7 +77,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, } } void flush_tlb_kernel_range(unsigned long start, unsigned long end) void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { unsigned int cpu = smp_processor_id(); unsigned long flags; Loading @@ -86,7 +86,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) local_irq_save(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */ flush_tlb_all(); local_flush_tlb_all(); } else { unsigned long asid; unsigned long saved_asid = get_asid(); Loading @@ -97,7 +97,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) end &= PAGE_MASK; set_asid(asid); while (start < end) { __flush_tlb_page(asid, start); flush_tlb_one(asid, start); start += PAGE_SIZE; } set_asid(saved_asid); Loading @@ -105,7 +105,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) local_irq_restore(flags); } void flush_tlb_mm(struct mm_struct *mm) void local_flush_tlb_mm(struct mm_struct *mm) { unsigned int cpu = smp_processor_id(); Loading @@ -122,7 +122,7 @@ void flush_tlb_mm(struct mm_struct *mm) } } void flush_tlb_all(void) void local_flush_tlb_all(void) { unsigned long flags, status; Loading
arch/sh/mm/tlb-nommu.c +6 −13 Original line number Diff line number Diff line Loading @@ -13,39 +13,33 @@ /* * Nothing too terribly exciting here .. */ void flush_tlb(void) { BUG(); } void flush_tlb_all(void) void local_flush_tlb_all(void) { BUG(); } void flush_tlb_mm(struct mm_struct *mm) void local_flush_tlb_mm(struct mm_struct *mm) { BUG(); } void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { BUG(); } void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { BUG(); } void __flush_tlb_page(unsigned long asid, unsigned long page) void local_flush_tlb_one(unsigned long asid, unsigned long page) { BUG(); } void flush_tlb_kernel_range(unsigned long start, unsigned long end) void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { BUG(); } Loading @@ -55,4 +49,3 @@ void update_mmu_cache(struct vm_area_struct * vma, { BUG(); }