Commit eb6563a6 authored by Thierry Reding's avatar Thierry Reding
Browse files

ARM: tegra: Add parent clock to DSI output



The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 7fb09952
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+3 −1
Original line number Diff line number Diff line
@@ -156,7 +156,9 @@ tvo@542c0000 {
		dsi@54300000 {
			compatible = "nvidia,tegra20-dsi";
			reg = <0x54300000 0x00040000>;
			clocks = <&tegra_car TEGRA20_CLK_DSI>;
			clocks = <&tegra_car TEGRA20_CLK_DSI>,
				 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
			clock-names = "dsi", "parent";
			resets = <&tegra_car 48>;
			reset-names = "dsi";
			status = "disabled";
+3 −1
Original line number Diff line number Diff line
@@ -257,7 +257,9 @@ tvo@542c0000 {
		dsi@54300000 {
			compatible = "nvidia,tegra30-dsi";
			reg = <0x54300000 0x00040000>;
			clocks = <&tegra_car TEGRA30_CLK_DSIA>;
			clocks = <&tegra_car TEGRA30_CLK_DSIA>,
				 <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
			clock-names = "dsi", "parent";
			resets = <&tegra_car 48>;
			reset-names = "dsi";
			status = "disabled";