Commit ed823991 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a779g0: Add RPC-IF clock 



Add the module clock used by the SPI Multi I/O Bus Controller (RPC-IF)
on the Renesas R-Car V4H (R8A779G0) SoC.

While at it, fix table alignment in the definition of the related
RPCSRC internal clock.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f0609c82e742865be753b67a0a6080f193f405ad.1665583328.git.geert+renesas@glider.be
parent 4ee04993

drivers/clk/renesas/r8a779g0-cpg-mssr.c

+2 −1
Original line number Diff line number Diff line
@@ -177,6 +177,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { 
	DEF_MOD("msi4",		622,	R8A779G0_CLK_MSO),

	DEF_MOD("msi5",		623,	R8A779G0_CLK_MSO),

	DEF_MOD("pwm",		628,	R8A779G0_CLK_SASYNCPERD4),

	DEF_MOD("rpc-if",	629,	R8A779G0_CLK_RPCD2),

	DEF_MOD("scif0",	702,	R8A779G0_CLK_SASYNCPERD4),

	DEF_MOD("scif1",	703,	R8A779G0_CLK_SASYNCPERD4),

	DEF_MOD("scif3",	704,	R8A779G0_CLK_SASYNCPERD4),