Commit ee373411 authored by Qingqing Zhuo's avatar Qingqing Zhuo Committed by Alex Deucher
Browse files

drm/amd/display: Re-arrange FPU code structure for dcn2x



[Why]
Current FPU code for DCN2x is located under dml/dcn2x.
This is not aligned with DC's general source tree
structure.

[How]
Move FPU code for DCN2x to dml/dcn20.

Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: default avatarSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 86adcb0b
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+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ static DEFINE_PER_CPU(int, fpu_recursion_depth);
 * This function tells if the code is already under FPU protection or not. A
 * function that works as an API for a set of FPU operations can use this
 * function for checking if the caller invoked it after DC_FP_START(). For
 * example, take a look at dcn2x.c file.
 * example, take a look at dcn20_fpu.c file.
 */
inline void dc_assert_fp_enabled(void)
{
+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@
#include "include/irq_service_interface.h"
#include "dcn20/dcn20_resource.h"

#include "dml/dcn2x/dcn2x.h"
#include "dml/dcn20/dcn20_fpu.h"

#include "dcn10/dcn10_hubp.h"
#include "dcn10/dcn10_ipp.h"
+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@
#include "dc.h"

#include "dcn201_init.h"
#include "dml/dcn2x/dcn2x.h"
#include "dml/dcn20/dcn20_fpu.h"
#include "resource.h"
#include "include/irq_service_interface.h"
#include "dcn201_resource.h"
+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@
#include "include/irq_service_interface.h"
#include "dcn20/dcn20_resource.h"

#include "dml/dcn2x/dcn2x.h"
#include "dml/dcn20/dcn20_fpu.h"

#include "clk_mgr.h"
#include "dcn10/dcn10_hubp.h"
+2 −2
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_ccflags)

ifdef CONFIG_DRM_AMD_DC_DCN
CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_vba.o := $(dml_ccflags)
CFLAGS_$(AMDDALPATH)/dc/dml/dcn2x/dcn2x.o := $(dml_ccflags)
CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/dcn20_fpu.o := $(dml_ccflags)
CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20.o := $(dml_ccflags)
CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20.o := $(dml_ccflags)
CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_rq_dlg_calc_20.o := $(dml_ccflags)
@@ -93,8 +93,8 @@ CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/display_rq_dlg_helpers.o := $(dml_rcflags)
DML = display_mode_lib.o display_rq_dlg_helpers.o dml1_display_rq_dlg_calc.o \

ifdef CONFIG_DRM_AMD_DC_DCN
DML += dcn20/dcn20_fpu.o
DML += display_mode_vba.o dcn20/display_rq_dlg_calc_20.o dcn20/display_mode_vba_20.o
DML += dcn2x/dcn2x.o
DML += dcn20/display_rq_dlg_calc_20v2.o dcn20/display_mode_vba_20v2.o
DML += dcn21/display_rq_dlg_calc_21.o dcn21/display_mode_vba_21.o
DML += dcn30/display_mode_vba_30.o dcn30/display_rq_dlg_calc_30.o
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