Unverified Commit f3af3b00 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge patch series "riscv: improve link and support ARCH_WANT_LD_ORPHAN_WARN" 

Jisheng Zhang <jszhang@kernel.org> says:

This series tries to improve link time handling of riscv:
patch1 adds the missing RUNTIME_DISCARD_EXIT as suggested by Masahiro.

Similar as other architectures such as x86, arm64 and so on, enable
ARCH_WANT_LD_ORPHAN_WARN to enable linker orphan warnings to prevent
from missing any new sections in future. So the following two patches
are preparation ones, and the last patch finally selects
ARCH_WANT_LD_ORPHAN_WARN

* b4-shazam-merge:
  riscv: select ARCH_WANT_LD_ORPHAN_WARN for !XIP_KERNEL
  riscv: vmlinux.lds.S: explicitly catch .init.bss sections from EFI stub
  riscv: vmlinux.lds.S: explicitly catch .riscv.attributes sections
  riscv: vmlinux.lds.S: explicitly catch .rela.dyn symbols
  riscv: lds: define RUNTIME_DISCARD_EXIT

Link: https://lore.kernel.org/r/20230119155417.2600-1-jszhang@kernel.org


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents 130aee3f f4b71bff

arch/riscv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ config RISCV 
	select ARCH_WANT_FRAME_POINTERS

	select ARCH_WANT_GENERAL_HUGETLB

	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT

	select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL

	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE

	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU

	select BUILDTIME_TABLE_SORT if MMU

arch/riscv/kernel/vmlinux.lds.S

+9 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
 */



#define RO_EXCEPTION_TABLE_ALIGN	4

#define RUNTIME_DISCARD_EXIT



#ifdef CONFIG_XIP_KERNEL

#include "vmlinux-xip.lds.S"
@@ -86,6 +87,9 @@ SECTIONS 
	/* Start of init data section */

	__init_data_begin = .;

	INIT_DATA_SECTION(16)

	.init.bss : {

		*(.init.bss)	/* from the EFI stub */

	}

	.exit.data :

	{

		EXIT_DATA
@@ -96,6 +100,10 @@ SECTIONS 
		*(.rel.dyn*)

	}



	.rela.dyn : {

		*(.rela*)

	}



	__init_data_end = .;



	. = ALIGN(8);
@@ -141,6 +149,7 @@ SECTIONS 
	STABS_DEBUG

	DWARF_DEBUG

	ELF_DETAILS

	.riscv.attributes 0 : { *(.riscv.attributes) }



	DISCARDS

}