Loading arch/parisc/kernel/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) /* for iosapic interrupts */ if (type) { set_irq_chip_and_handler(irq, type, parisc_do_IRQ); set_irq_chip_and_handler(irq, type, handle_level_irq); set_irq_chip_data(irq, data); cpu_unmask_irq(irq); } Loading drivers/parisc/iosapic.c +6 −31 Original line number Diff line number Diff line Loading @@ -615,7 +615,7 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1) } static void iosapic_disable_irq(unsigned int irq) static void iosapic_mask_irq(unsigned int irq) { unsigned long flags; struct vector_info *vi = get_irq_chip_data(irq); Loading @@ -628,7 +628,7 @@ static void iosapic_disable_irq(unsigned int irq) spin_unlock_irqrestore(&iosapic_lock, flags); } static void iosapic_enable_irq(unsigned int irq) static void iosapic_unmask_irq(unsigned int irq) { struct vector_info *vi = get_irq_chip_data(irq); u32 d0, d1; Loading Loading @@ -669,31 +669,9 @@ printk("\n"); DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, vi->eoi_addr, vi->eoi_data); iosapic_eoi(vi->eoi_addr, vi->eoi_data); } /* * PARISC only supports PCI devices below I/O SAPIC. * PCI only supports level triggered in order to share IRQ lines. * ergo I/O SAPIC must always issue EOI on parisc. * * i386/ia64 support ISA devices and have to deal with * edge-triggered interrupts too. */ static void iosapic_end_irq(unsigned int irq) { struct vector_info *vi = get_irq_chip_data(irq); DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq, vi->eoi_addr, vi->eoi_data); iosapic_eoi(vi->eoi_addr, vi->eoi_data); cpu_eoi_irq(irq); } static unsigned int iosapic_startup_irq(unsigned int irq) { iosapic_enable_irq(irq); return 0; } #ifdef CONFIG_SMP static int iosapic_set_affinity_irq(unsigned int irq, const struct cpumask *dest) Loading Loading @@ -724,12 +702,9 @@ static int iosapic_set_affinity_irq(unsigned int irq, static struct irq_chip iosapic_interrupt_type = { .name = "IO-SAPIC-level", .startup = iosapic_startup_irq, .shutdown = iosapic_disable_irq, .enable = iosapic_enable_irq, .disable = iosapic_disable_irq, .unmask = iosapic_unmask_irq, .mask = iosapic_mask_irq, .ack = cpu_ack_irq, .end = iosapic_end_irq, #ifdef CONFIG_SMP .set_affinity = iosapic_set_affinity_irq, #endif Loading Loading
arch/parisc/kernel/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) /* for iosapic interrupts */ if (type) { set_irq_chip_and_handler(irq, type, parisc_do_IRQ); set_irq_chip_and_handler(irq, type, handle_level_irq); set_irq_chip_data(irq, data); cpu_unmask_irq(irq); } Loading
drivers/parisc/iosapic.c +6 −31 Original line number Diff line number Diff line Loading @@ -615,7 +615,7 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1) } static void iosapic_disable_irq(unsigned int irq) static void iosapic_mask_irq(unsigned int irq) { unsigned long flags; struct vector_info *vi = get_irq_chip_data(irq); Loading @@ -628,7 +628,7 @@ static void iosapic_disable_irq(unsigned int irq) spin_unlock_irqrestore(&iosapic_lock, flags); } static void iosapic_enable_irq(unsigned int irq) static void iosapic_unmask_irq(unsigned int irq) { struct vector_info *vi = get_irq_chip_data(irq); u32 d0, d1; Loading Loading @@ -669,31 +669,9 @@ printk("\n"); DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, vi->eoi_addr, vi->eoi_data); iosapic_eoi(vi->eoi_addr, vi->eoi_data); } /* * PARISC only supports PCI devices below I/O SAPIC. * PCI only supports level triggered in order to share IRQ lines. * ergo I/O SAPIC must always issue EOI on parisc. * * i386/ia64 support ISA devices and have to deal with * edge-triggered interrupts too. */ static void iosapic_end_irq(unsigned int irq) { struct vector_info *vi = get_irq_chip_data(irq); DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq, vi->eoi_addr, vi->eoi_data); iosapic_eoi(vi->eoi_addr, vi->eoi_data); cpu_eoi_irq(irq); } static unsigned int iosapic_startup_irq(unsigned int irq) { iosapic_enable_irq(irq); return 0; } #ifdef CONFIG_SMP static int iosapic_set_affinity_irq(unsigned int irq, const struct cpumask *dest) Loading Loading @@ -724,12 +702,9 @@ static int iosapic_set_affinity_irq(unsigned int irq, static struct irq_chip iosapic_interrupt_type = { .name = "IO-SAPIC-level", .startup = iosapic_startup_irq, .shutdown = iosapic_disable_irq, .enable = iosapic_enable_irq, .disable = iosapic_disable_irq, .unmask = iosapic_unmask_irq, .mask = iosapic_mask_irq, .ack = cpu_ack_irq, .end = iosapic_end_irq, #ifdef CONFIG_SMP .set_affinity = iosapic_set_affinity_irq, #endif Loading