Commit f4720b84 authored by Peng Fan's avatar Peng Fan Committed by Linus Walleij
Browse files

dt-bindings: pinctrl: imx8m: Integrate duplicated i.MX 8M schemas



The i.MX8MM/N/P/Q IOMUXC schemas are basically the same, it does not to
have four schemas for almost the same binding.

Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230104021430.3503497-1-peng.fan@oss.nxp.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e8c39b3e
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+15 −9
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# SPDX-License-Identifier: GPL-2.0
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX8MM IOMUX Controller
title: Freescale IMX8M IOMUX Controller

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>
  - Peng Fan <peng.fan@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
@@ -15,7 +15,11 @@ description:

properties:
  compatible:
    const: fsl,imx8mm-iomuxc
    enum:
      - fsl,imx8mm-iomuxc
      - fsl,imx8mn-iomuxc
      - fsl,imx8mp-iomuxc
      - fsl,imx8mq-iomuxc

  reg:
    maxItems: 1
@@ -34,9 +38,10 @@ patternProperties:
          each entry consists of 6 integers and represents the mux and config
          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
          be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last
          integer CONFIG is the pad setting value like pull-up on this pin. Please
          refer to i.MX8M Mini Reference Manual for detailed CONFIG settings.
          be found in <arch/arm64/boot/dts/freescale/imx8m[m,n,p,q]-pinfunc.h>.
          The last integer CONFIG is the pad setting value like pull-up on this
          pin. Please refer to i.MX8M Mini/Nano/Plus/Quad Reference Manual for
          detailed CONFIG settings.
        $ref: /schemas/types.yaml#/definitions/uint32-matrix
        items:
          items:
@@ -51,7 +56,8 @@ patternProperties:
            - description: |
                "input_val" indicates the select input value to be applied.
            - description: |
                "pad_setting" indicates the pad configuration value to be applied.
                "pad_setting" indicates the pad configuration value to be
                applied.

    required:
      - fsl,pins
+0 −84
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mn-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX8MN IOMUX Controller

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
  for common binding part and usage.

properties:
  compatible:
    const: fsl,imx8mn-iomuxc

  reg:
    maxItems: 1

# Client device subnode's properties
patternProperties:
  'grp$':
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.

    properties:
      fsl,pins:
        description:
          each entry consists of 6 integers and represents the mux and config
          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
          be found in <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last
          integer CONFIG is the pad setting value like pull-up on this pin. Please
          refer to i.MX8M Nano Reference Manual for detailed CONFIG settings.
        $ref: /schemas/types.yaml#/definitions/uint32-matrix
        items:
          items:
            - description: |
                "mux_reg" indicates the offset of mux register.
            - description: |
                "conf_reg" indicates the offset of pad configuration register.
            - description: |
                "input_reg" indicates the offset of select input register.
            - description: |
                "mux_val" indicates the mux value to be applied.
            - description: |
                "input_val" indicates the select input value to be applied.
            - description: |
                "pad_setting" indicates the pad configuration value to be applied.

    required:
      - fsl,pins

    additionalProperties: false

allOf:
  - $ref: "pinctrl.yaml#"

required:
  - compatible
  - reg

additionalProperties: false

examples:
  # Pinmux controller node
  - |
    iomuxc: pinctrl@30330000 {
        compatible = "fsl,imx8mn-iomuxc";
        reg = <0x30330000 0x10000>;

        pinctrl_uart2: uart2grp {
            fsl,pins =
                <0x23C 0x4A4 0x4FC 0x0 0x0	0x140>,
                <0x240 0x4A8 0x000 0x0 0x0	0x140>;
        };
    };

...
+0 −84
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX8MP IOMUX Controller

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
  for common binding part and usage.

properties:
  compatible:
    const: fsl,imx8mp-iomuxc

  reg:
    maxItems: 1

# Client device subnode's properties
patternProperties:
  'grp$':
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.

    properties:
      fsl,pins:
        description:
          each entry consists of 6 integers and represents the mux and config
          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
          be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
          integer CONFIG is the pad setting value like pull-up on this pin. Please
          refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.
        $ref: /schemas/types.yaml#/definitions/uint32-matrix
        items:
          items:
            - description: |
                "mux_reg" indicates the offset of mux register.
            - description: |
                "conf_reg" indicates the offset of pad configuration register.
            - description: |
                "input_reg" indicates the offset of select input register.
            - description: |
                "mux_val" indicates the mux value to be applied.
            - description: |
                "input_val" indicates the select input value to be applied.
            - description: |
                "pad_setting" indicates the pad configuration value to be applied.

    required:
      - fsl,pins

    additionalProperties: false

allOf:
  - $ref: "pinctrl.yaml#"

required:
  - compatible
  - reg

additionalProperties: false

examples:
  # Pinmux controller node
  - |
    iomuxc: pinctrl@30330000 {
        compatible = "fsl,imx8mp-iomuxc";
        reg = <0x30330000 0x10000>;

        pinctrl_uart2: uart2grp {
            fsl,pins =
                <0x228 0x488 0x5F0 0x0 0x6	0x49>,
                <0x228 0x488 0x000 0x0 0x0	0x49>;
        };
    };

...
+0 −84
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX8MQ IOMUX Controller

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
  for common binding part and usage.

properties:
  compatible:
    const: fsl,imx8mq-iomuxc

  reg:
    maxItems: 1

# Client device subnode's properties
patternProperties:
  'grp$':
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.

    properties:
      fsl,pins:
        description:
          each entry consists of 6 integers and represents the mux and config
          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
          be found in <arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h>. The last
          integer CONFIG is the pad setting value like pull-up on this pin. Please
          refer to i.MX8M Quad Reference Manual for detailed CONFIG settings.
        $ref: /schemas/types.yaml#/definitions/uint32-matrix
        items:
          items:
            - description: |
                "mux_reg" indicates the offset of mux register.
            - description: |
                "conf_reg" indicates the offset of pad configuration register.
            - description: |
                "input_reg" indicates the offset of select input register.
            - description: |
                "mux_val" indicates the mux value to be applied.
            - description: |
                "input_val" indicates the select input value to be applied.
            - description: |
                "pad_setting" indicates the pad configuration value to be applied.

    required:
      - fsl,pins

    additionalProperties: false

allOf:
  - $ref: "pinctrl.yaml#"

required:
  - compatible
  - reg

additionalProperties: false

examples:
  # Pinmux controller node
  - |
    iomuxc: pinctrl@30330000 {
        compatible = "fsl,imx8mq-iomuxc";
        reg = <0x30330000 0x10000>;

        pinctrl_uart1: uart1grp {
            fsl,pins =
                <0x234 0x49C 0x4F4 0x0 0x0	0x49>,
                <0x238 0x4A0 0x4F4 0x0 0x0	0x49>;
        };
    };

...