Commit f4b3295f authored by hersen wu's avatar hersen wu Committed by Alex Deucher
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drm/amd/powerplay: add interface to get uclk dpm table 



dc needs get uclk dpm table for bandwidth calculation

Signed-off-by: default avatarhersen wu <hersenxs.wu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 26e2b581

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+3 −0
Original line number Diff line number Diff line
@@ -611,6 +611,7 @@ struct pptable_funcs { 
					     enum smu_clk_type clk_type,

					     uint32_t *value);

	int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);

	int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);

};



struct smu_funcs
@@ -897,6 +898,8 @@ struct smu_funcs 
	((smu)->funcs->register_irq_handler ? (smu)->funcs->register_irq_handler(smu) : 0)

#define smu_set_azalia_d3_pme(smu) \

	((smu)->funcs->set_azalia_d3_pme ? (smu)->funcs->set_azalia_d3_pme((smu)) : 0)

#define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \

	((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)



extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,

				   uint16_t *size, uint8_t *frev, uint8_t *crev,

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+30 −0
Original line number Diff line number Diff line
@@ -1248,6 +1248,35 @@ static int navi10_read_sensor(struct smu_context *smu, 
	return ret;

}



static int navi10_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states)

{

	uint32_t num_discrete_levels = 0;

	uint16_t *dpm_levels = NULL;

	uint16_t i = 0;

	struct smu_table_context *table_context = &smu->smu_table;

	PPTable_t *driver_ppt = NULL;



	if (!clocks_in_khz || !num_states || !table_context->driver_pptable)

		return -EINVAL;



	driver_ppt = table_context->driver_pptable;

	num_discrete_levels = driver_ppt->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels;

	dpm_levels = driver_ppt->FreqTableUclk;



	if (num_discrete_levels == 0 || dpm_levels == NULL)

		return -EINVAL;



	*num_states = num_discrete_levels;

	for (i = 0; i < num_discrete_levels; i++) {

		/* convert to khz */

		*clocks_in_khz = (*dpm_levels) * 1000;

		clocks_in_khz++;

		dpm_levels++;

	}



	return 0;

}



static const struct pptable_funcs navi10_ppt_funcs = {

	.tables_init = navi10_tables_init,

	.alloc_dpm_context = navi10_allocate_dpm_context,
@@ -1281,6 +1310,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { 
	.get_profiling_clk_mask = navi10_get_profiling_clk_mask,

	.set_watermarks_table = navi10_set_watermarks_table,

	.read_sensor = navi10_read_sensor,

	.get_uclk_dpm_states = navi10_get_uclk_dpm_states,

};



void navi10_set_ppt_funcs(struct smu_context *smu)