Loading drivers/gpu/drm/nouveau/core/core/enum.c +4 −4 Original line number Diff line number Diff line Loading @@ -45,9 +45,9 @@ nouveau_enum_print(const struct nouveau_enum *en, u32 value) { en = nouveau_enum_find(en, value); if (en) printk("%s", en->name); pr_cont("%s", en->name); else printk("(unknown enum 0x%08x)", value); pr_cont("(unknown enum 0x%08x)", value); } void Loading @@ -55,7 +55,7 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32 value) { while (bf->name) { if (value & bf->mask) { printk(" %s", bf->name); pr_cont(" %s", bf->name); value &= ~bf->mask; } Loading @@ -63,5 +63,5 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32 value) } if (value) printk(" (unknown bits 0x%08x)", value); pr_cont(" (unknown bits 0x%08x)", value); } drivers/gpu/drm/nouveau/core/engine/copy/nva3.c +1 −1 Original line number Diff line number Diff line Loading @@ -100,7 +100,7 @@ nva3_copy_intr(struct nouveau_subdev *subdev) if (stat & 0x00000040) { nv_error(falcon, "DISPATCH_ERROR ["); nouveau_enum_print(nva3_copy_isr_error_name, ssta); printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", pr_cont("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", chid, inst << 12, subc, mthd, data); nv_wo32(falcon, 0x004, 0x00000040); stat &= ~0x00000040; Loading drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c +1 −1 Original line number Diff line number Diff line Loading @@ -128,7 +128,7 @@ nv84_crypt_intr(struct nouveau_subdev *subdev) if (stat) { nv_error(priv, ""); nouveau_bitfield_print(nv84_crypt_intr_mask, stat); printk(" ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n", pr_cont(" ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n", chid, (u64)inst << 12, mthd, data); } Loading drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c +1 −1 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ nv98_crypt_intr(struct nouveau_subdev *subdev) if (stat & 0x00000040) { nv_error(priv, "DISPATCH_ERROR ["); nouveau_enum_print(nv98_crypt_isr_error_name, ssta); printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", pr_cont("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", chid, (u64)inst << 12, subc, mthd, data); nv_wr32(priv, 0x087004, 0x00000040); stat &= ~0x00000040; Loading drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c +5 −5 Original line number Diff line number Diff line Loading @@ -420,16 +420,16 @@ nvc0_fifo_isr_vm_fault(struct nvc0_fifo_priv *priv, int unit) nv_error(priv, "%s fault at 0x%010llx [", (stat & 0x00000080) ? "write" : "read", (u64)vahi << 32 | valo); nouveau_enum_print(nvc0_fifo_fault_reason, stat & 0x0000000f); printk("] from "); pr_cont("] from "); nouveau_enum_print(nvc0_fifo_fault_unit, unit); if (stat & 0x00000040) { printk("/"); pr_cont("/"); nouveau_enum_print(nvc0_fifo_fault_hubclient, client); } else { printk("/GPC%d/", (stat & 0x1f000000) >> 24); pr_cont("/GPC%d/", (stat & 0x1f000000) >> 24); nouveau_enum_print(nvc0_fifo_fault_gpcclient, client); } printk(" on channel 0x%010llx\n", (u64)inst << 12); pr_cont(" on channel 0x%010llx\n", (u64)inst << 12); } static int Loading Loading @@ -484,7 +484,7 @@ nvc0_fifo_isr_subfifo_intr(struct nvc0_fifo_priv *priv, int unit) if (show) { nv_error(priv, "SUBFIFO%d:", unit); nouveau_bitfield_print(nvc0_fifo_subfifo_intr, show); printk("\n"); pr_cont("\n"); nv_error(priv, "SUBFIFO%d: ch %d subc %d mthd 0x%04x " "data 0x%08x\n", unit, chid, subc, mthd, data); Loading Loading
drivers/gpu/drm/nouveau/core/core/enum.c +4 −4 Original line number Diff line number Diff line Loading @@ -45,9 +45,9 @@ nouveau_enum_print(const struct nouveau_enum *en, u32 value) { en = nouveau_enum_find(en, value); if (en) printk("%s", en->name); pr_cont("%s", en->name); else printk("(unknown enum 0x%08x)", value); pr_cont("(unknown enum 0x%08x)", value); } void Loading @@ -55,7 +55,7 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32 value) { while (bf->name) { if (value & bf->mask) { printk(" %s", bf->name); pr_cont(" %s", bf->name); value &= ~bf->mask; } Loading @@ -63,5 +63,5 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32 value) } if (value) printk(" (unknown bits 0x%08x)", value); pr_cont(" (unknown bits 0x%08x)", value); }
drivers/gpu/drm/nouveau/core/engine/copy/nva3.c +1 −1 Original line number Diff line number Diff line Loading @@ -100,7 +100,7 @@ nva3_copy_intr(struct nouveau_subdev *subdev) if (stat & 0x00000040) { nv_error(falcon, "DISPATCH_ERROR ["); nouveau_enum_print(nva3_copy_isr_error_name, ssta); printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", pr_cont("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", chid, inst << 12, subc, mthd, data); nv_wo32(falcon, 0x004, 0x00000040); stat &= ~0x00000040; Loading
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c +1 −1 Original line number Diff line number Diff line Loading @@ -128,7 +128,7 @@ nv84_crypt_intr(struct nouveau_subdev *subdev) if (stat) { nv_error(priv, ""); nouveau_bitfield_print(nv84_crypt_intr_mask, stat); printk(" ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n", pr_cont(" ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n", chid, (u64)inst << 12, mthd, data); } Loading
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c +1 −1 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ nv98_crypt_intr(struct nouveau_subdev *subdev) if (stat & 0x00000040) { nv_error(priv, "DISPATCH_ERROR ["); nouveau_enum_print(nv98_crypt_isr_error_name, ssta); printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", pr_cont("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n", chid, (u64)inst << 12, subc, mthd, data); nv_wr32(priv, 0x087004, 0x00000040); stat &= ~0x00000040; Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c +5 −5 Original line number Diff line number Diff line Loading @@ -420,16 +420,16 @@ nvc0_fifo_isr_vm_fault(struct nvc0_fifo_priv *priv, int unit) nv_error(priv, "%s fault at 0x%010llx [", (stat & 0x00000080) ? "write" : "read", (u64)vahi << 32 | valo); nouveau_enum_print(nvc0_fifo_fault_reason, stat & 0x0000000f); printk("] from "); pr_cont("] from "); nouveau_enum_print(nvc0_fifo_fault_unit, unit); if (stat & 0x00000040) { printk("/"); pr_cont("/"); nouveau_enum_print(nvc0_fifo_fault_hubclient, client); } else { printk("/GPC%d/", (stat & 0x1f000000) >> 24); pr_cont("/GPC%d/", (stat & 0x1f000000) >> 24); nouveau_enum_print(nvc0_fifo_fault_gpcclient, client); } printk(" on channel 0x%010llx\n", (u64)inst << 12); pr_cont(" on channel 0x%010llx\n", (u64)inst << 12); } static int Loading Loading @@ -484,7 +484,7 @@ nvc0_fifo_isr_subfifo_intr(struct nvc0_fifo_priv *priv, int unit) if (show) { nv_error(priv, "SUBFIFO%d:", unit); nouveau_bitfield_print(nvc0_fifo_subfifo_intr, show); printk("\n"); pr_cont("\n"); nv_error(priv, "SUBFIFO%d: ch %d subc %d mthd 0x%04x " "data 0x%08x\n", unit, chid, subc, mthd, data); Loading