Commit f55f32ee authored by Iskren Chernev's avatar Iskren Chernev Committed by Stephen Boyd
Browse files

clk: qcom: smd: Add support for SM6115 rpm clocks 



Add rpm smd clocks, PMIC and bus clocks which are required on
SM4250/6115 for clients to vote on.

Signed-off-by: default avatarIskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210731164827.2756798-2-iskren.chernev@gmail.com


[sboyd@kernel.org: Drop duplicate define, merge with sm6125 support]
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent edeb2ca7

drivers/clk/qcom/clk-smd-rpm.c

+42 −0
Original line number Diff line number Diff line
@@ -968,6 +968,47 @@ static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { 
	.num_clks = ARRAY_SIZE(sm6125_clks),

};



/* SM6115 */

static struct clk_smd_rpm *sm6115_clks[] = {

	[RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,

	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,

	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,

	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,

	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,

	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,

	[RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,

	[RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,

	[RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,

	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,

	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,

	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,

	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,

	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,

	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,

	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,

	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,

	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,

	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,

	[RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,

	[RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,

	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,

	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,

	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,

	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,

	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,

	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,

	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,

	[RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,

	[RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,

	[RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,

	[RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin,

};



static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {

	.clks = sm6115_clks,

	.num_clks = ARRAY_SIZE(sm6115_clks),

};



static const struct of_device_id rpm_smd_clk_match_table[] = {

	{ .compatible = "qcom,rpmcc-msm8226", .data = &rpm_clk_msm8974 },

	{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
@@ -980,6 +1021,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { 
	{ .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },

	{ .compatible = "qcom,rpmcc-qcs404",  .data = &rpm_clk_qcs404  },

	{ .compatible = "qcom,rpmcc-sdm660",  .data = &rpm_clk_sdm660  },

	{ .compatible = "qcom,rpmcc-sm6115",  .data = &rpm_clk_sm6115  },

	{ .compatible = "qcom,rpmcc-sm6125",  .data = &rpm_clk_sm6125  },

	{ }

};