Commit f78f0263 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi
Browse files

PCI: dwc: Rework MSI initialization 

There are 3 possible MSI implementations for the DWC host. The first is
using the built-in DWC MSI controller. The 2nd is a custom MSI
controller as part of the PCI host (keystone only). The 3rd is an
external MSI controller (typically GICv3 ITS). Currently, the last 2
are distinguished with a .msi_host_init() hook with the 3rd option using
an empty function. However we can detect the 3rd case with the presence
of 'msi-parent' or 'msi-map' properties, so let's do that instead and
remove the empty functions.

Link: https://lore.kernel.org/r/20201105211159.1814485-10-robh@kernel.org


Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarJingoo Han <jingoohan1@gmail.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Minghuan Lian <minghuan.Lian@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Roy Zang <roy.zang@nxp.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: linuxppc-dev@lists.ozlabs.org
parent 5bcb1757

drivers/pci/controller/dwc/pci-keystone.c

+0 −9
Original line number Diff line number Diff line
@@ -272,14 +272,6 @@ static void ks_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, 
	ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset);

}



/*

 * Dummy function so that DW core doesn't configure MSI

 */

static int ks_pcie_am654_msi_host_init(struct pcie_port *pp)

{

	return 0;

}



static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie)

{

	ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL);
@@ -854,7 +846,6 @@ static const struct dw_pcie_host_ops ks_pcie_host_ops = { 


static const struct dw_pcie_host_ops ks_pcie_am654_host_ops = {

	.host_init = ks_pcie_host_init,

	.msi_host_init = ks_pcie_am654_msi_host_init,

};



static irqreturn_t ks_pcie_err_irq_handler(int irq, void *priv)

drivers/pci/controller/dwc/pci-layerscape.c

+0 −25
Original line number Diff line number Diff line
@@ -168,37 +168,12 @@ static int ls1021_pcie_host_init(struct pcie_port *pp) 
	return ls_pcie_host_init(pp);

}



static int ls_pcie_msi_host_init(struct pcie_port *pp)

{

	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);

	struct device *dev = pci->dev;

	struct device_node *np = dev->of_node;

	struct device_node *msi_node;



	/*

	 * The MSI domain is set by the generic of_msi_configure().  This

	 * .msi_host_init() function keeps us from doing the default MSI

	 * domain setup in dw_pcie_host_init() and also enforces the

	 * requirement that "msi-parent" exists.

	 */

	msi_node = of_parse_phandle(np, "msi-parent", 0);

	if (!msi_node) {

		dev_err(dev, "failed to find msi-parent\n");

		return -EINVAL;

	}



	of_node_put(msi_node);

	return 0;

}



static const struct dw_pcie_host_ops ls1021_pcie_host_ops = {

	.host_init = ls1021_pcie_host_init,

	.msi_host_init = ls_pcie_msi_host_init,

};



static const struct dw_pcie_host_ops ls_pcie_host_ops = {

	.host_init = ls_pcie_host_init,

	.msi_host_init = ls_pcie_msi_host_init,

};



static const struct dw_pcie_ops dw_ls1021_pcie_ops = {

drivers/pci/controller/dwc/pcie-designware-host.c

+12 −8
Original line number Diff line number Diff line
@@ -365,6 +365,10 @@ int dw_pcie_host_init(struct pcie_port *pp) 
		pci->link_gen = of_pci_get_max_link_speed(np);



	if (pci_msi_enabled()) {

		pp->has_msi_ctrl = !(pp->ops->msi_host_init ||

				     of_property_read_bool(np, "msi-parent") ||

				     of_property_read_bool(np, "msi-map"));



		if (!pp->num_vectors) {

			pp->num_vectors = MSI_DEF_NUM_VECTORS;

		} else if (pp->num_vectors > MAX_MSI_IRQS) {
@@ -372,7 +376,11 @@ int dw_pcie_host_init(struct pcie_port *pp) 
			return -EINVAL;

		}



		if (!pp->ops->msi_host_init) {

		if (pp->ops->msi_host_init) {

			ret = pp->ops->msi_host_init(pp);

			if (ret < 0)

				return ret;

		} else if (pp->has_msi_ctrl) {

			if (!pp->msi_irq) {

				pp->msi_irq = platform_get_irq_byname_optional(pdev, "msi");

				if (pp->msi_irq < 0) {
@@ -402,10 +410,6 @@ int dw_pcie_host_init(struct pcie_port *pp) 
				pp->msi_data = 0;

				goto err_free_msi;

			}

		} else {

			ret = pp->ops->msi_host_init(pp);

			if (ret < 0)

				return ret;

		}

	}
@@ -426,7 +430,7 @@ int dw_pcie_host_init(struct pcie_port *pp) 
		return 0;



err_free_msi:

	if (pci_msi_enabled() && !pp->ops->msi_host_init)

	if (pp->has_msi_ctrl)

		dw_pcie_free_msi(pp);

	return ret;

}
@@ -436,7 +440,7 @@ void dw_pcie_host_deinit(struct pcie_port *pp) 
{

	pci_stop_root_bus(pp->bridge->bus);

	pci_remove_root_bus(pp->bridge->bus);

	if (pci_msi_enabled() && !pp->ops->msi_host_init)

	if (pp->has_msi_ctrl)

		dw_pcie_free_msi(pp);

}

EXPORT_SYMBOL_GPL(dw_pcie_host_deinit);
@@ -544,7 +548,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp) 


	dw_pcie_setup(pci);



	if (pci_msi_enabled() && !pp->ops->msi_host_init) {

	if (pp->has_msi_ctrl) {

		num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;



		/* Initialize IRQ Status array */

drivers/pci/controller/dwc/pcie-designware.h

+1 −0
Original line number Diff line number Diff line
@@ -176,6 +176,7 @@ struct dw_pcie_host_ops { 
};



struct pcie_port {

	bool			has_msi_ctrl:1;

	u64			cfg0_base;

	void __iomem		*va_cfg0_base;

	u32			cfg0_size;

drivers/pci/controller/dwc/pcie-intel-gw.c

+0 −9
Original line number Diff line number Diff line
@@ -385,14 +385,6 @@ static int intel_pcie_rc_init(struct pcie_port *pp) 
	return intel_pcie_host_setup(lpp);

}



/*

 * Dummy function so that DW core doesn't configure MSI

 */

static int intel_pcie_msi_init(struct pcie_port *pp)

{

	return 0;

}



static u64 intel_pcie_cpu_addr(struct dw_pcie *pcie, u64 cpu_addr)

{

	return cpu_addr + BUS_IATU_OFFSET;
@@ -404,7 +396,6 @@ static const struct dw_pcie_ops intel_pcie_ops = { 


static const struct dw_pcie_host_ops intel_pcie_dw_ops = {

	.host_init =		intel_pcie_rc_init,

	.msi_host_init =	intel_pcie_msi_init,

};



static const struct intel_pcie_soc pcie_data = {