Commit f81c31d9 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: Move vcn ras block init to ras sw_init



Initialize vcn ras block only when vcn ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_int.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarStanley Yang <Stanley.Yang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5640e06e
Loading
Loading
Loading
Loading
+19 −10
Original line number Diff line number Diff line
@@ -1162,19 +1162,28 @@ int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
	return 0;
}

void amdgpu_vcn_set_ras_funcs(struct amdgpu_device *adev)
int amdgpu_vcn_ras_sw_init(struct amdgpu_device *adev)
{
	int err;
	struct amdgpu_vcn_ras *ras;

	if (!adev->vcn.ras)
		return;
		return 0;

	amdgpu_ras_register_ras_block(adev, &adev->vcn.ras->ras_block);
	ras = adev->vcn.ras;
	err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
	if (err) {
		dev_err(adev->dev, "Failed to register vcn ras block!\n");
		return err;
	}

	strcpy(adev->vcn.ras->ras_block.ras_comm.name, "vcn");
	adev->vcn.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;
	adev->vcn.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;
	adev->vcn.ras_if = &adev->vcn.ras->ras_block.ras_comm;
	strcpy(ras->ras_block.ras_comm.name, "vcn");
	ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;
	ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;
	adev->vcn.ras_if = &ras->ras_block.ras_comm;

	/* If don't define special ras_late_init function, use default ras_late_init */
	if (!adev->vcn.ras->ras_block.ras_late_init)
		adev->vcn.ras->ras_block.ras_late_init = amdgpu_ras_block_late_init;
	if (!ras->ras_block.ras_late_init)
		ras->ras_block.ras_late_init = amdgpu_ras_block_late_init;

	return 0;
}
+1 −1
Original line number Diff line number Diff line
@@ -400,6 +400,6 @@ void amdgpu_debugfs_vcn_fwlog_init(struct amdgpu_device *adev,
int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
			struct amdgpu_irq_src *source,
			struct amdgpu_iv_entry *entry);
void amdgpu_vcn_set_ras_funcs(struct amdgpu_device *adev);
int amdgpu_vcn_ras_sw_init(struct amdgpu_device *adev);

#endif
+4 −2
Original line number Diff line number Diff line
@@ -225,6 +225,10 @@ static int vcn_v2_5_sw_init(void *handle)
	if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
		adev->vcn.pause_dpg_mode = vcn_v2_5_pause_dpg_mode;

	r = amdgpu_vcn_ras_sw_init(adev);
	if (r)
		return r;

	return 0;
}

@@ -2031,6 +2035,4 @@ static void vcn_v2_5_set_ras_funcs(struct amdgpu_device *adev)
	default:
		break;
	}

	amdgpu_vcn_set_ras_funcs(adev);
}
+4 −2
Original line number Diff line number Diff line
@@ -181,6 +181,10 @@ static int vcn_v4_0_sw_init(void *handle)
	if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
		adev->vcn.pause_dpg_mode = vcn_v4_0_pause_dpg_mode;

	r = amdgpu_vcn_ras_sw_init(adev);
	if (r)
		return r;

	return 0;
}

@@ -2123,6 +2127,4 @@ static void vcn_v4_0_set_ras_funcs(struct amdgpu_device *adev)
	default:
		break;
	}

	amdgpu_vcn_set_ras_funcs(adev);
}