Unverified Commit f9ced7db authored by V sujith kumar Reddy's avatar V sujith kumar Reddy Committed by Mark Brown
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ASoC: SOF: amd: Fix for selecting clock source as external clock. 



By default clock source is selected as internal clock of 96Mhz
which is not configurable. Now we select the clock source to
external clock (ACLK) which can be configurable to different clock
ranges depending on usecase.

Signed-off-by: default avatarV sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20221123121911.3446224-3-vsujithkumar.reddy@amd.corp-partner.google.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent aae7e412

sound/soc/sof/amd/acp.c

+3 −1
Original line number Diff line number Diff line
@@ -390,6 +390,7 @@ static int acp_power_on(struct snd_sof_dev *sdev) 


static int acp_reset(struct snd_sof_dev *sdev)

{

	const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);

	unsigned int val;

	int ret;
@@ -410,6 +411,7 @@ static int acp_reset(struct snd_sof_dev *sdev) 
	if (ret < 0)

		dev_err(sdev->dev, "timeout in releasing reset\n");



	snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK);

	return ret;

}
@@ -456,7 +458,7 @@ int amd_sof_acp_resume(struct snd_sof_dev *sdev) 
		return ret;

	}



	snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, 0x03);

	snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK);



	ret = acp_memory_init(sdev);

sound/soc/sof/amd/acp.h

+8 −0
Original line number Diff line number Diff line
@@ -69,6 +69,14 @@ 
#define BOX_SIZE_512				0x200

#define BOX_SIZE_1024				0x400



enum clock_source {

	ACP_CLOCK_96M = 0,

	ACP_CLOCK_48M,

	ACP_CLOCK_24M,

	ACP_CLOCK_ACLK,

	ACP_CLOCK_MCLK,

};



struct  acp_atu_grp_pte {

	u32 low;

	u32 high;