Commit fa338be0 authored by Vasanthakumar Thiagarajan's avatar Vasanthakumar Thiagarajan Committed by Kalle Valo
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ath6kl: Fix missing gpio pin 9 configuration 



GPIO pin 9 also needs to be configured along with other gpio
pins to avoid sdio crc errors. I've not experienced any issue
with missing this particular gpio pin configuration, found dunring
code review. This can potentially improve rx performance.

Signed-off-by: default avatarVasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 33a6664a

drivers/net/wireless/ath/ath6kl/init.c

+6 −0
Original line number Diff line number Diff line
@@ -1392,6 +1392,12 @@ static int ath6kl_init_upload(struct ath6kl *ar) 
	    ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {

		ath6kl_err("temporary war to avoid sdio crc error\n");



		param = 0x28;

		address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;

		status = ath6kl_bmi_reg_write(ar, address, param);

		if (status)

			return status;



		param = 0x20;



		address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;

drivers/net/wireless/ath/ath6kl/target.h

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ 
#define LPO_CAL_ENABLE_S		20

#define LPO_CAL_ENABLE			0x00100000



#define GPIO_PIN9_ADDRESS		0x0000004c

#define GPIO_PIN10_ADDRESS		0x00000050

#define GPIO_PIN11_ADDRESS		0x00000054

#define GPIO_PIN12_ADDRESS		0x00000058