Commit faaa9f6e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoC changes for 5.6,
please pull the following:

- Nicolas unifies the CMA reserved region declaration between all
  BCM283x/BCM2711 chips in order for firmwares to easily adjust those
  based on the use case needs

- Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for
  the Raspberry Pi 4. The driver will go through the PCIe maintainers
  pull request for 5.6.

* tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm2711: Enable PCIe controller
  ARM: dts: bcm283x: Unify CMA configuration

Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b0e55fef d5c8dc0d
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+43 −21
Original line number Diff line number Diff line
@@ -12,26 +12,6 @@ / {

	interrupt-parent = <&gicv2>;

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;

		/*
		 * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
		 * that's not good enough for the BCM2711 as some devices can
		 * only address the lower 1G of memory (ZONE_DMA).
		 */
		linux,cma {
			compatible = "shared-dma-pool";
			size = <0x2000000>; /* 32MB */
			alloc-ranges = <0x0 0x00000000 0x40000000>;
			reusable;
			linux,cma-default;
		};
	};


	soc {
		/*
		 * Defined ranges:
@@ -329,7 +309,36 @@ scb {
		#address-cells = <2>;
		#size-cells = <1>;

		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;
		ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,
			 <0x6 0x00000000  0x6 0x00000000  0x40000000>;

		pcie0: pcie@7d500000 {
			compatible = "brcm,bcm2711-pcie";
			reg = <0x0 0x7d500000 0x9310>;
			device_type = "pci";
			#address-cells = <3>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "pcie", "msi";
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
							IRQ_TYPE_LEVEL_HIGH>;
			msi-controller;
			msi-parent = <&pcie0>;

			ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
				  0x0 0x04000000>;
			/*
			 * The wrapper around the PCIe block has a bug
			 * preventing it from accessing beyond the first 3GB of
			 * memory.
			 */
			dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
				      0x0 0xc0000000>;
			brcm,enable-ssc;
		};

		genet: ethernet@7d580000 {
			compatible = "brcm,bcm2711-genet-v5";
@@ -826,6 +835,19 @@ pin-rts {
	};
};

&rmem {
	#address-cells = <2>;
};

&cma {
	/*
	 * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
	 * that's not good enough for the BCM2711 as some devices can
	 * only address the lower 1G of memory (ZONE_DMA).
	 */
	alloc-ranges = <0x0 0x00000000 0x40000000>;
};

&i2c0 {
	compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
	interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+13 −0
Original line number Diff line number Diff line
@@ -30,6 +30,19 @@ chosen {
		stdout-path = "serial0:115200n8";
	};

	rmem: reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		cma: linux,cma {
			compatible = "shared-dma-pool";
			size = <0x4000000>; /* 64MB */
			reusable;
			linux,cma-default;
		};
	};

	thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <0>;