Commit fbe8ff72 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.5-2023-08-09' of... 

Merge tag 'amd-drm-fixes-6.5-2023-08-09' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.5-2023-08-09:

amdgpu:
- S/G display workaround for platforms with >= 64G of memory
- S0i3 fix
- SMU 13.0.0 fixes
- Disable SMU 13.x OD features temporarily while the interface is reworked
  to enable additional functionality
- Fix cursor gamma issues on DCN3+
- SMU 13.0.6 fixes
- Fix possible UAF in CS IOCTL
- Polaris display regression fix
- Only enable CP GFX shadowing on SR-IOV

amdkfd:
- Raven/Picasso KFD regression fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230809182827.8135-1-alexander.deucher@amd.com
parents 8ba371c7 091ae547

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1296,6 +1296,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, 
void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);

int amdgpu_device_pci_reset(struct amdgpu_device *adev);

bool amdgpu_device_need_post(struct amdgpu_device *adev);

bool amdgpu_sg_display_supported(struct amdgpu_device *adev);

bool amdgpu_device_pcie_dynamic_switching_supported(void);

bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);

bool amdgpu_device_aspm_support_quirk(void);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -295,7 +295,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p, 


	if (!p->gang_size) {

		ret = -EINVAL;

		goto free_partial_kdata;

		goto free_all_kdata;

	}



	for (i = 0; i < p->gang_size; ++i) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+26 −0
Original line number Diff line number Diff line
@@ -1458,6 +1458,32 @@ bool amdgpu_device_need_post(struct amdgpu_device *adev) 
	return true;

}



/*

 * On APUs with >= 64GB white flickering has been observed w/ SG enabled.

 * Disable S/G on such systems until we have a proper fix.

 * https://gitlab.freedesktop.org/drm/amd/-/issues/2354

 * https://gitlab.freedesktop.org/drm/amd/-/issues/2735

 */

bool amdgpu_sg_display_supported(struct amdgpu_device *adev)

{

	switch (amdgpu_sg_display) {

	case -1:

		break;

	case 0:

		return false;

	case 1:

		return true;

	default:

		return false;

	}

	if ((totalram_pages() << (PAGE_SHIFT - 10)) +

	    (adev->gmc.real_vram_size / 1024) >= 64000000) {

		DRM_WARN("Disabling S/G due to >=64GB RAM\n");

		return false;

	}

	return true;

}



/*

 * Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic

 * speed switching. Until we have confirmation from Intel that a specific host

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+6 −2
Original line number Diff line number Diff line
@@ -471,8 +471,12 @@ static void gfx_v11_0_check_fw_cp_gfx_shadow(struct amdgpu_device *adev) 
	case IP_VERSION(11, 0, 3):

		if ((adev->gfx.me_fw_version >= 1505) &&

		    (adev->gfx.pfp_fw_version >= 1600) &&

		    (adev->gfx.mec_fw_version >= 512))

		    (adev->gfx.mec_fw_version >= 512)) {

			if (amdgpu_sriov_vf(adev))

				adev->gfx.cp_gfx_shadow = true;

			else

				adev->gfx.cp_gfx_shadow = false;

		}

		break;

	default:

		adev->gfx.cp_gfx_shadow = false;

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

+8 −7
Original line number Diff line number Diff line
@@ -137,14 +137,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp) 
	int ret;

	int retry_loop;



	/* Wait for bootloader to signify that it is ready having bit 31 of

	 * C2PMSG_35 set to 1. All other bits are expected to be cleared.

	 * If there is an error in processing command, bits[7:0] will be set.

	 * This is applicable for PSP v13.0.6 and newer.

	 */

	for (retry_loop = 0; retry_loop < 10; retry_loop++) {

		/* Wait for bootloader to signify that is

		    ready having bit 31 of C2PMSG_35 set to 1 */

		ret = psp_wait_for(psp,

				   SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),

				   0x80000000,

				   0x80000000,

				   false);

		ret = psp_wait_for(

			psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),

			0x80000000, 0xffffffff, false);



		if (ret == 0)

			return 0;