Commit fc05b884 authored by David Jander's avatar David Jander Committed by Marc Kleine-Budde
Browse files

can: flexcan: correctly initialize mailboxes 



Apparently mailboxes may contain random data at startup, causing some of them
being prepared for message reception. This causes overruns being missed or even
confusing the IRQ check for trasmitted messages, increasing the transmit
counter instead of the error counter.

This patch initializes all mailboxes after the FIFO as RX_INACTIVE.

Signed-off-by: default avatarDavid Jander <david@protonic.nl>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent c32fe4ad

drivers/net/can/flexcan.c

+7 −0
Original line number Original line Diff line number Diff line
@@ -812,6 +812,7 @@ static int flexcan_chip_start(struct net_device *dev) 
	struct flexcan_regs __iomem *regs = priv->base;

	struct flexcan_regs __iomem *regs = priv->base;

	int err;

	int err;

	u32 reg_mcr, reg_ctrl;

	u32 reg_mcr, reg_ctrl;

	int i;





	/* enable module */

	/* enable module */

	err = flexcan_chip_enable(priv);

	err = flexcan_chip_enable(priv);
@@ -878,6 +879,12 @@ static int flexcan_chip_start(struct net_device *dev) 
	netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);

	netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);

	flexcan_write(reg_ctrl, &regs->ctrl);

	flexcan_write(reg_ctrl, &regs->ctrl);





	/* clear and invalidate all mailboxes first */

	for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->cantxfg); i++) {

		flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE,

			      &regs->cantxfg[i].can_ctrl);

	}



	/* mark TX mailbox as INACTIVE */

	/* mark TX mailbox as INACTIVE */

	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,

	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,

		      &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);

		      &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);