Commit fc7b83bc authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
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dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml

parent aa3555c5
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip specific extensions to the Analogix Display Port PHY

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

properties:
  compatible:
    const: rockchip,rk3288-dp-phy

  clocks:
    maxItems: 1

  clock-names:
    const: 24m

  "#phy-cells":
    const: 0

required:
  - compatible
  - clocks
  - clock-names
  - "#phy-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3288-cru.h>
    edp-phy {
      compatible = "rockchip,rk3288-dp-phy";
      clocks = <&cru SCLK_EDP_24M>;
      clock-names = "24m";
      #phy-cells = <0>;
    };
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Rockchip specific extensions to the Analogix Display Port PHY
------------------------------------

Required properties:
- compatible : should be one of the following supported values:
	 - "rockchip.rk3288-dp-phy"
- clocks: from common clock binding: handle to dp clock.
	of memory mapped region.
- clock-names: from common clock binding:
	Required elements: "24m"
- #phy-cells : from the generic PHY bindings, must be 0;

Example:

grf: syscon@ff770000 {
	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";

...

	edp_phy: edp-phy {
		compatible = "rockchip,rk3288-dp-phy";
		clocks = <&cru SCLK_EDP_24M>;
		clock-names = "24m";
		#phy-cells = <0>;
	};
};