Loading arch/arm/boot/dts/r8a7779.dtsi +60 −0 Original line number Diff line number Diff line Loading @@ -196,6 +196,66 @@ i2c3: i2c@ffc73000 { status = "disabled"; }; scif0: serial@ffe40000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupt-parent = <&gic>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif1: serial@ffe41000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe41000 0x100>; interrupt-parent = <&gic>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif2: serial@ffe42000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe42000 0x100>; interrupt-parent = <&gic>; interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif3: serial@ffe43000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe43000 0x100>; interrupt-parent = <&gic>; interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif4: serial@ffe44000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe44000 0x100>; interrupt-parent = <&gic>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif5: serial@ffe45000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe45000 0x100>; interrupt-parent = <&gic>; interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; pfc: pfc@fffc0000 { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc0000 0x23c>; Loading Loading
arch/arm/boot/dts/r8a7779.dtsi +60 −0 Original line number Diff line number Diff line Loading @@ -196,6 +196,66 @@ i2c3: i2c@ffc73000 { status = "disabled"; }; scif0: serial@ffe40000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupt-parent = <&gic>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif1: serial@ffe41000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe41000 0x100>; interrupt-parent = <&gic>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif2: serial@ffe42000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe42000 0x100>; interrupt-parent = <&gic>; interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif3: serial@ffe43000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe43000 0x100>; interrupt-parent = <&gic>; interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif4: serial@ffe44000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe44000 0x100>; interrupt-parent = <&gic>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; scif5: serial@ffe45000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe45000 0x100>; interrupt-parent = <&gic>; interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg_clocks R8A7779_CLK_P>; clock-names = "sci_ick"; status = "disabled"; }; pfc: pfc@fffc0000 { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc0000 0x23c>; Loading