Commit fd9c55c0 authored by Wolfram Sang's avatar Wolfram Sang Committed by Geert Uytterhoeven
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soc: renesas: rcar-sysc: Remove R-Car H3 ES1.* handling



R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds.  These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC.  Public users only have ES2 onwards.

Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230307105645.5285-5-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fe15c26e
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+0 −10
Original line number Diff line number Diff line
@@ -38,8 +38,6 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
	{ "a3vp",	0x340, 0, R8A7795_PD_A3VP,	R8A7795_PD_ALWAYS_ON },
	{ "cr7",	0x240, 0, R8A7795_PD_CR7,	R8A7795_PD_ALWAYS_ON },
	{ "a3vc",	0x380, 0, R8A7795_PD_A3VC,	R8A7795_PD_ALWAYS_ON },
	/* A2VC0 exists on ES1.x only */
	{ "a2vc0",	0x3c0, 0, R8A7795_PD_A2VC0,	R8A7795_PD_A3VC },
	{ "a2vc1",	0x3c0, 1, R8A7795_PD_A2VC1,	R8A7795_PD_A3VC },
	{ "3dg-a",	0x100, 0, R8A7795_PD_3DG_A,	R8A7795_PD_ALWAYS_ON },
	{ "3dg-b",	0x100, 1, R8A7795_PD_3DG_B,	R8A7795_PD_3DG_A },
@@ -54,14 +52,10 @@ static struct rcar_sysc_area r8a7795_areas[] __initdata = {
	 * Fixups for R-Car H3 revisions
	 */

#define HAS_A2VC0	BIT(0)		/* Power domain A2VC0 is present */
#define NO_EXTMASK	BIT(1)		/* Missing SYSCEXTMASK register */

static const struct soc_device_attribute r8a7795_quirks_match[] __initconst = {
	{
		.soc_id = "r8a7795", .revision = "ES1.*",
		.data = (void *)(HAS_A2VC0 | NO_EXTMASK),
	}, {
		.soc_id = "r8a7795", .revision = "ES2.*",
		.data = (void *)(NO_EXTMASK),
	},
@@ -77,10 +71,6 @@ static int __init r8a7795_sysc_init(void)
	if (attr)
		quirks = (uintptr_t)attr->data;

	if (!(quirks & HAS_A2VC0))
		rcar_sysc_nullify(r8a7795_areas, ARRAY_SIZE(r8a7795_areas),
				  R8A7795_PD_A2VC0);

	if (quirks & NO_EXTMASK)
		r8a7795_sysc_info.extmask_val = 0;

+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@
#define R8A7795_PD_CA53_SCU		21
#define R8A7795_PD_3DG_E		22
#define R8A7795_PD_A3IR			24
#define R8A7795_PD_A2VC0		25	/* ES1.x only */
#define R8A7795_PD_A2VC1		26

/* Always-on power area */