Loading arch/alpha/Kconfig +34 −2 Original line number Diff line number Diff line Loading @@ -627,9 +627,41 @@ config VERBOSE_MCHECK_ON Take the default (1) unless you want more control or more info. choice prompt "Timer interrupt frequency (HZ)?" default HZ_128 if ALPHA_QEMU default HZ_1200 if ALPHA_RAWHIDE default HZ_1024 ---help--- The frequency at which timer interrupts occur. A high frequency minimizes latency, whereas a low frequency minimizes overhead of process accounting. The later effect is especially significant when being run under QEMU. Note that some Alpha hardware cannot change the interrupt frequency of the timer. If unsure, say 1024 (or 1200 for Rawhide). config HZ_32 bool "32 Hz" config HZ_64 bool "64 Hz" config HZ_128 bool "128 Hz" config HZ_256 bool "256 Hz" config HZ_1024 bool "1024 Hz" config HZ_1200 bool "1200 Hz" endchoice config HZ int default 1200 if ALPHA_RAWHIDE default 32 if HZ_32 default 64 if HZ_64 default 128 if HZ_128 default 256 if HZ_256 default 1200 if HZ_1200 default 1024 source "drivers/pci/Kconfig" Loading arch/alpha/kernel/setup.c +8 −2 Original line number Diff line number Diff line Loading @@ -1218,6 +1218,7 @@ show_cpuinfo(struct seq_file *f, void *slot) char *systype_name; char *sysvariation_name; int nr_processors; unsigned long timer_freq; cpu_index = (unsigned) (cpu->type - 1); cpu_name = "Unknown"; Loading @@ -1229,6 +1230,12 @@ show_cpuinfo(struct seq_file *f, void *slot) nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 timer_freq = (100UL * hwrpb->intr_freq) / 4096; #else timer_freq = 100UL * CONFIG_HZ; #endif seq_printf(f, "cpu\t\t\t: Alpha\n" "cpu model\t\t: %s\n" "cpu variation\t\t: %ld\n" Loading @@ -1254,8 +1261,7 @@ show_cpuinfo(struct seq_file *f, void *slot) (char*)hwrpb->ssn, est_cycle_freq ? : hwrpb->cycle_freq, est_cycle_freq ? "est." : "", hwrpb->intr_freq / 4096, (100 * hwrpb->intr_freq / 4096) % 100, timer_freq / 100, timer_freq % 100, hwrpb->pagesize, hwrpb->pa_bits, hwrpb->max_asn, Loading arch/alpha/kernel/time.c +17 −7 Original line number Diff line number Diff line Loading @@ -201,15 +201,25 @@ irqreturn_t timer_interrupt(int irq, void *dev) void __init common_init_rtc(void) { unsigned char x; unsigned char x, sel = 0; /* Reset periodic interrupt frequency. */ #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; /* Test includes known working values on various platforms where 0x26 is wrong; we refuse to change those. */ if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { printk("Setting RTC_FREQ to 1024 Hz (%x)\n", x); CMOS_WRITE(0x26, RTC_FREQ_SELECT); sel = RTC_REF_CLCK_32KHZ + 6; } #elif CONFIG_HZ == 256 || CONFIG_HZ == 128 || CONFIG_HZ == 64 || CONFIG_HZ == 32 sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ); #else # error "Unknown HZ from arch/alpha/Kconfig" #endif if (sel) { printk(KERN_INFO "Setting RTC_FREQ to %d Hz (%x)\n", CONFIG_HZ, sel); CMOS_WRITE(sel, RTC_FREQ_SELECT); } /* Turn on periodic interrupts. */ Loading Loading
arch/alpha/Kconfig +34 −2 Original line number Diff line number Diff line Loading @@ -627,9 +627,41 @@ config VERBOSE_MCHECK_ON Take the default (1) unless you want more control or more info. choice prompt "Timer interrupt frequency (HZ)?" default HZ_128 if ALPHA_QEMU default HZ_1200 if ALPHA_RAWHIDE default HZ_1024 ---help--- The frequency at which timer interrupts occur. A high frequency minimizes latency, whereas a low frequency minimizes overhead of process accounting. The later effect is especially significant when being run under QEMU. Note that some Alpha hardware cannot change the interrupt frequency of the timer. If unsure, say 1024 (or 1200 for Rawhide). config HZ_32 bool "32 Hz" config HZ_64 bool "64 Hz" config HZ_128 bool "128 Hz" config HZ_256 bool "256 Hz" config HZ_1024 bool "1024 Hz" config HZ_1200 bool "1200 Hz" endchoice config HZ int default 1200 if ALPHA_RAWHIDE default 32 if HZ_32 default 64 if HZ_64 default 128 if HZ_128 default 256 if HZ_256 default 1200 if HZ_1200 default 1024 source "drivers/pci/Kconfig" Loading
arch/alpha/kernel/setup.c +8 −2 Original line number Diff line number Diff line Loading @@ -1218,6 +1218,7 @@ show_cpuinfo(struct seq_file *f, void *slot) char *systype_name; char *sysvariation_name; int nr_processors; unsigned long timer_freq; cpu_index = (unsigned) (cpu->type - 1); cpu_name = "Unknown"; Loading @@ -1229,6 +1230,12 @@ show_cpuinfo(struct seq_file *f, void *slot) nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 timer_freq = (100UL * hwrpb->intr_freq) / 4096; #else timer_freq = 100UL * CONFIG_HZ; #endif seq_printf(f, "cpu\t\t\t: Alpha\n" "cpu model\t\t: %s\n" "cpu variation\t\t: %ld\n" Loading @@ -1254,8 +1261,7 @@ show_cpuinfo(struct seq_file *f, void *slot) (char*)hwrpb->ssn, est_cycle_freq ? : hwrpb->cycle_freq, est_cycle_freq ? "est." : "", hwrpb->intr_freq / 4096, (100 * hwrpb->intr_freq / 4096) % 100, timer_freq / 100, timer_freq % 100, hwrpb->pagesize, hwrpb->pa_bits, hwrpb->max_asn, Loading
arch/alpha/kernel/time.c +17 −7 Original line number Diff line number Diff line Loading @@ -201,15 +201,25 @@ irqreturn_t timer_interrupt(int irq, void *dev) void __init common_init_rtc(void) { unsigned char x; unsigned char x, sel = 0; /* Reset periodic interrupt frequency. */ #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; /* Test includes known working values on various platforms where 0x26 is wrong; we refuse to change those. */ if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { printk("Setting RTC_FREQ to 1024 Hz (%x)\n", x); CMOS_WRITE(0x26, RTC_FREQ_SELECT); sel = RTC_REF_CLCK_32KHZ + 6; } #elif CONFIG_HZ == 256 || CONFIG_HZ == 128 || CONFIG_HZ == 64 || CONFIG_HZ == 32 sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ); #else # error "Unknown HZ from arch/alpha/Kconfig" #endif if (sel) { printk(KERN_INFO "Setting RTC_FREQ to %d Hz (%x)\n", CONFIG_HZ, sel); CMOS_WRITE(sel, RTC_FREQ_SELECT); } /* Turn on periodic interrupts. */ Loading