Commit fedd0cbf authored by Michael Walle's avatar Michael Walle Committed by Tudor Ambarus
Browse files

mtd: spi-nor: spansion: unify function names 



To avoid name clashes unify all the function and static object names and
use one of the following prefixes which should be sufficiently unique:
 - <vendor>_nor_
 - <flash_family>_nor_
 - <flash_part>_

There are no functional changes.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: default avatarPratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-13-michael@walle.cc
parent c9d5cdf4

drivers/mtd/spi-nor/spansion.c

+17 −17
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
#define SPINOR_OP_CYPRESS_RD_FAST		0xee



/**

 * spi_nor_cypress_octal_dtr_enable() - Enable octal DTR on Cypress flashes.

 * cypress_nor_octal_dtr_enable() - Enable octal DTR on Cypress flashes.

 * @nor:		pointer to a 'struct spi_nor'

 * @enable:              whether to enable or disable Octal DTR

 *
@@ -29,7 +29,7 @@ 
 *

 * Return: 0 on success, -errno otherwise.

 */

static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)

static int cypress_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)

{

	struct spi_mem_op op;

	u8 *buf = nor->bouncebuf;
@@ -116,7 +116,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable) 


static void s28hs512t_default_init(struct spi_nor *nor)

{

	nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;

	nor->params->octal_dtr_enable = cypress_nor_octal_dtr_enable;

	nor->params->writesize = 16;

}
@@ -183,7 +183,7 @@ static const struct spi_nor_fixups s28hs512t_fixups = { 
};



static int

s25fs_s_post_bfpt_fixups(struct spi_nor *nor,

s25fs_s_nor_post_bfpt_fixups(struct spi_nor *nor,

			     const struct sfdp_parameter_header *bfpt_header,

			     const struct sfdp_bfpt *bfpt)

{
@@ -198,11 +198,11 @@ s25fs_s_post_bfpt_fixups(struct spi_nor *nor, 
	return 0;

}



static const struct spi_nor_fixups s25fs_s_fixups = {

	.post_bfpt = s25fs_s_post_bfpt_fixups,

static const struct spi_nor_fixups s25fs_s_nor_fixups = {

	.post_bfpt = s25fs_s_nor_post_bfpt_fixups,

};



static const struct flash_info spansion_parts[] = {

static const struct flash_info spansion_nor_parts[] = {

	/* Spansion/Cypress -- single (large) sector size only, at least

	 * for the chips listed here (without boot sectors).

	 */
@@ -229,7 +229,7 @@ static const struct flash_info spansion_parts[] = { 
	{ "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)

		FLAGS(USE_CLSR)

		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)

		.fixups = &s25fs_s_fixups, },

		.fixups = &s25fs_s_nor_fixups, },

	{ "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)

		FLAGS(USE_CLSR)

		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
@@ -239,7 +239,7 @@ static const struct flash_info spansion_parts[] = { 
	{ "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256)

		FLAGS(USE_CLSR)

		NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)

		.fixups = &s25fs_s_fixups, },

		.fixups = &s25fs_s_nor_fixups, },

	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64) },

	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256) },

	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64)
@@ -294,7 +294,7 @@ static const struct flash_info spansion_parts[] = { 
	},

};



static void spansion_late_init(struct spi_nor *nor)

static void spansion_nor_late_init(struct spi_nor *nor)

{

	if (nor->params->size <= SZ_16M)

		return;
@@ -305,13 +305,13 @@ static void spansion_late_init(struct spi_nor *nor) 
	nor->mtd.erasesize = nor->info->sector_size;

}



static const struct spi_nor_fixups spansion_fixups = {

	.late_init = spansion_late_init,

static const struct spi_nor_fixups spansion_nor_fixups = {

	.late_init = spansion_nor_late_init,

};



const struct spi_nor_manufacturer spi_nor_spansion = {

	.name = "spansion",

	.parts = spansion_parts,

	.nparts = ARRAY_SIZE(spansion_parts),

	.fixups = &spansion_fixups,

	.parts = spansion_nor_parts,

	.nparts = ARRAY_SIZE(spansion_nor_parts),

	.fixups = &spansion_nor_fixups,

};