Commit ff82009f authored by Drew Fustini's avatar Drew Fustini Committed by Tony Lindgren
Browse files

ARM: dts: am33xx-l4: add gpio-ranges 

Add gpio-ranges properties to the gpio controller nodes.

These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE
REGISTERS" in the  "AM335x Technical Reference Manual" [0] and "Table
4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1].
A csv file with this data is available for reference [2].

These mappings are valid for all SoC's that are using am33xx-l4.dtsi.
In addition, the only TI AM33xx parts that actually exist are [0]:
AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359

These gpio-ranges properties should be added as they describe the
relationship between a gpio line and pin control register that exists
in the hardware.  For example, GPMC_A0 pin has mode 7 which is labeled
gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16.

[0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[1] http://www.ti.com/lit/ds/symlink/am3358.pdf
[2] https://gist.github.com/pdp7/6ffaddc8867973c1c3e8612cfaf72020
[3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html



Signed-off-by: default avatarDrew Fustini <drew@beagleboard.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 96cafa00

arch/arm/boot/dts/am33xx-l4.dtsi

+24 −0
Original line number Diff line number Diff line
@@ -151,6 +151,18 @@ SYSC_OMAP2_SOFTRESET | 


			gpio0: gpio@0 {

				compatible = "ti,omap4-gpio";

				gpio-ranges =	<&am33xx_pinmux  0  82 8>,

						<&am33xx_pinmux  8  52 4>,

						<&am33xx_pinmux 12  94 4>,

						<&am33xx_pinmux 16  71 2>,

						<&am33xx_pinmux 18 135 1>,

						<&am33xx_pinmux 19 108 2>,

						<&am33xx_pinmux 21  73 1>,

						<&am33xx_pinmux 22   8 2>,

						<&am33xx_pinmux 26  10 2>,

						<&am33xx_pinmux 28  74 1>,

						<&am33xx_pinmux 29  81 1>,

						<&am33xx_pinmux 30  28 2>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -1296,6 +1308,10 @@ SYSC_OMAP2_SOFTRESET | 


			gpio1: gpio@0 {

				compatible = "ti,omap4-gpio";

				gpio-ranges =   <&am33xx_pinmux  0  0  8>,

						<&am33xx_pinmux  8 90  4>,

						<&am33xx_pinmux 12 12 16>,

						<&am33xx_pinmux 28 30  4>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -1698,6 +1714,9 @@ SYSC_OMAP2_SOFTRESET | 


			gpio2: gpio@0 {

				compatible = "ti,omap4-gpio";

                                gpio-ranges =	<&am33xx_pinmux  0 34 18>,

						<&am33xx_pinmux 18 77  4>,

						<&am33xx_pinmux 22 56 10>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -1731,6 +1750,11 @@ SYSC_OMAP2_SOFTRESET | 


			gpio3: gpio@0 {

				compatible = "ti,omap4-gpio";

				gpio-ranges =	<&am33xx_pinmux  0  66 5>,

						<&am33xx_pinmux  5  98 2>,

						<&am33xx_pinmux  7  75 2>,

						<&am33xx_pinmux 13 141 1>,

						<&am33xx_pinmux 14 100 8>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;