Skip to content
Commit ffc011b6 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: dts: ux500: Tag Janice display SPI correct



The s6e63m0 display used "type 3" SPI communication so
flag the device as using negative clocking and polarity
on the SPI bus.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 6880fa6c
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment