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Commit 04bc7d96 authored by Sylwester Nawrocki's avatar Sylwester Nawrocki Committed by Tomasz Figa
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clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks



Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and
replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA
has correct clock assigned on Exynos4x12 SoCs.

Suggested-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
parent 42fb57c0
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