Commit 0a7c1c88 authored Mar 03, 2022 by Biju Das Committed by Geert Uytterhoeven Apr 04, 2022

arm64: dts: renesas: rzg2l-smarc: Move out i2c3 and Audio codec from common dtsi



On RZ/G2L SoM module, the Audio codec is connected to i2c3 bus whereas on
RZ/G2LC, it is connected to i2c2 bus. So move out i2c3 and wm8978 nodes
from common dtsi to soc specific dtsi.

While at it add wm8978 node to RZ/G2LC SoC specific dtsi to fix the
build error.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-3-biju.das.jz@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

parent a2b642d8

arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts

+0 −6

Original line number	Diff line number	Diff line
		@@ -26,12 +26,6 @@ &i2c1 {
		status = "disabled";
		};

		&i2c3 {
		/delete-property/ pinctrl-0;
		/delete-property/ pinctrl-names;
		status = "disabled";
		};

		&spi1 {
		/delete-property/ pinctrl-0;
		/delete-property/ pinctrl-names;

arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi

+0 −15

Original line number	Diff line number	Diff line
		@@ -26,7 +26,6 @@ aliases {
		serial0 = &scif0;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c3 = &i2c3;
		};

		chosen {
		@@ -131,20 +130,6 @@ &i2c1 {
		status = "okay";
		};

		&i2c3 {
		pinctrl-0 = <&i2c3_pins>;
		pinctrl-names = "default";
		clock-frequency = <400000>;

		status = "okay";

		wm8978: codec@1a {
		compatible = "wlf,wm8978";
		#sound-dai-cells = <0>;
		reg = <0x1a>;
		};
		};

		&ohci0 {
		dr_mode = "otg";
		status = "okay";

arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi

+15 −0

Original line number	Diff line number	Diff line
		@@ -14,6 +14,21 @@
		/ {
		aliases {
		serial1 = &scif2;
		i2c3 = &i2c3;
		};
		};

		&i2c3 {
		pinctrl-0 = <&i2c3_pins>;
		pinctrl-names = "default";
		clock-frequency = <400000>;

		status = "okay";

		wm8978: codec@1a {
		compatible = "wlf,wm8978";
		#sound-dai-cells = <0>;
		reg = <0x1a>;
		};
		};

arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi

+11 −0

Original line number	Diff line number	Diff line
		@@ -43,6 +43,7 @@
		/ {
		aliases {
		serial1 = &scif1;
		i2c2 = &i2c2;
		};
		};

		@@ -59,6 +60,16 @@ &canfd {
		};
		#endif

		&i2c2 {
		status = "disabled";

		wm8978: codec@1a {
		compatible = "wlf,wm8978";
		#sound-dai-cells = <0>;
		reg = <0x1a>;
		};
		};

		/*
		* To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
		* SW1 should be at position 2->3 so that SER0_CTS# line is activated