Commit 148a3956 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Stephen Boyd
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clk: mediatek: mt7986-infracfg: Migrate to common probe mechanism 



Convert this driver to use the common mtk_clk_simple_probe() mechanism.
While at it, also use module_platform_driver() instead, as this driver
just gained a .remove() callback during the conversion.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Tested-by: default avatarDaniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-34-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 2562dc42

drivers/clk/mediatek/clk-mt7986-infracfg.c

+17 −44
Original line number Diff line number Diff line
@@ -157,57 +157,30 @@ static const struct mtk_gate infra_clks[] = { 
	GATE_INFRA2(CLK_INFRA_IPCIEB_CK, "infra_ipcieb", "sysaxi_sel", 15),

};



static int clk_mt7986_infracfg_probe(struct platform_device *pdev)

{

	struct clk_hw_onecell_data *clk_data;

	struct device_node *node = pdev->dev.of_node;

	int r;

	void __iomem *base;

	int nr = ARRAY_SIZE(infra_divs) + ARRAY_SIZE(infra_muxes) +

		 ARRAY_SIZE(infra_clks);



	base = of_iomap(node, 0);

	if (!base) {

		pr_err("%s(): ioremap failed\n", __func__);

		return -ENOMEM;

	}



	clk_data = mtk_alloc_clk_data(nr);



	if (!clk_data)

		return -ENOMEM;



	mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);

	mtk_clk_register_muxes(&pdev->dev, infra_muxes,

			       ARRAY_SIZE(infra_muxes), node,

			       &mt7986_clk_lock, clk_data);

	mtk_clk_register_gates(&pdev->dev, node, infra_clks,

			       ARRAY_SIZE(infra_clks), clk_data);



	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

	if (r) {

		pr_err("%s(): could not register clock provider: %d\n",

		       __func__, r);

		goto free_infracfg_data;

	}

	return r;



free_infracfg_data:

	mtk_free_clk_data(clk_data);

	return r;



}

static const struct mtk_clk_desc infra_desc = {

	.clks = infra_clks,

	.num_clks = ARRAY_SIZE(infra_clks),

	.factor_clks = infra_divs,

	.num_factor_clks = ARRAY_SIZE(infra_divs),

	.mux_clks = infra_muxes,

	.num_mux_clks = ARRAY_SIZE(infra_muxes),

	.clk_lock = &mt7986_clk_lock,

};



static const struct of_device_id of_match_clk_mt7986_infracfg[] = {

	{ .compatible = "mediatek,mt7986-infracfg", },

	{}

	{ .compatible = "mediatek,mt7986-infracfg", .data = &infra_desc },

	{ /* sentinel */ }

};



static struct platform_driver clk_mt7986_infracfg_drv = {

	.probe = clk_mt7986_infracfg_probe,

	.driver = {

		.name = "clk-mt7986-infracfg",

		.of_match_table = of_match_clk_mt7986_infracfg,

	},

	.probe = mtk_clk_simple_probe,

	.remove = mtk_clk_simple_remove,

};

builtin_platform_driver(clk_mt7986_infracfg_drv);
 
module_platform_driver(clk_mt7986_infracfg_drv);



MODULE_DESCRIPTION("MediaTek MT7986 infracfg clocks driver");

MODULE_LICENSE("GPL");