Commit 157ed9cb authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-x86-pmu-6.3' of https://github.com/kvm-x86/linux into HEAD 

KVM x86 PMU changes for 6.3:

 - Add support for created masked events for the PMU filter to allow
   userspace to heavily restrict what events the guest can use without
   needing to create an absurd number of events

 - Clean up KVM's handling of "PMU MSRs to save", especially when vPMU
   support is disabled

 - Add PEBS support for Intel SPR
parents 1c5ec0d4 13738a36

Documentation/virt/kvm/api.rst

+71 −7
Original line number Diff line number Diff line
@@ -5005,6 +5005,15 @@ using this ioctl. 
:Parameters: struct kvm_pmu_event_filter (in)

:Returns: 0 on success, -1 on error



Errors:



  ======     ============================================================

  EFAULT     args[0] cannot be accessed

  EINVAL     args[0] contains invalid data in the filter or filter events

  E2BIG      nevents is too large

  EBUSY      not enough memory to allocate the filter

  ======     ============================================================



::



  struct kvm_pmu_event_filter {
@@ -5016,14 +5025,69 @@ using this ioctl. 
	__u64 events[0];

  };



This ioctl restricts the set of PMU events that the guest can program.

The argument holds a list of events which will be allowed or denied.

The eventsel+umask of each event the guest attempts to program is compared

against the events field to determine whether the guest should have access.

The events field only controls general purpose counters; fixed purpose

counters are controlled by the fixed_counter_bitmap.

This ioctl restricts the set of PMU events the guest can program by limiting

which event select and unit mask combinations are permitted.



The argument holds a list of filter events which will be allowed or denied.



Filter events only control general purpose counters; fixed purpose counters

are controlled by the fixed_counter_bitmap.



Valid values for 'flags'::



``0``



To use this mode, clear the 'flags' field.



In this mode each event will contain an event select + unit mask.



When the guest attempts to program the PMU the guest's event select +

unit mask is compared against the filter events to determine whether the

guest should have access.



``KVM_PMU_EVENT_FLAG_MASKED_EVENTS``

:Capability: KVM_CAP_PMU_EVENT_MASKED_EVENTS



In this mode each filter event will contain an event select, mask, match, and

exclude value.  To encode a masked event use::



  KVM_PMU_ENCODE_MASKED_ENTRY()



An encoded event will follow this layout::



  Bits   Description

  ----   -----------

  7:0    event select (low bits)

  15:8   umask match

  31:16  unused

  35:32  event select (high bits)

  36:54  unused

  55     exclude bit

  63:56  umask mask



When the guest attempts to program the PMU, these steps are followed in

determining if the guest should have access:



 1. Match the event select from the guest against the filter events.

 2. If a match is found, match the guest's unit mask to the mask and match

    values of the included filter events.

    I.e. (unit mask & mask) == match && !exclude.

 3. If a match is found, match the guest's unit mask to the mask and match

    values of the excluded filter events.

    I.e. (unit mask & mask) == match && exclude.

 4.

   a. If an included match is found and an excluded match is not found, filter

      the event.

   b. For everything else, do not filter the event.

 5.

   a. If the event is filtered and it's an allow list, allow the guest to

      program the event.

   b. If the event is filtered and it's a deny list, do not allow the guest to

      program the event.



No flags are defined yet, the field must be zero.

When setting a new pmu event filter, -EINVAL will be returned if any of the

unused fields are set or if any of the high bits (35:32) in the event

select are set when called on Intel.



Valid values for 'action'::

arch/x86/events/intel/core.c

+1 −0
Original line number Diff line number Diff line
@@ -6348,6 +6348,7 @@ __init int intel_pmu_init(void) 
		x86_pmu.pebs_constraints = intel_spr_pebs_event_constraints;

		x86_pmu.extra_regs = intel_spr_extra_regs;

		x86_pmu.limit_period = spr_limit_period;

		x86_pmu.pebs_ept = 1;

		x86_pmu.pebs_aliases = NULL;

		x86_pmu.pebs_prec_dist = true;

		x86_pmu.pebs_block = true;

arch/x86/events/intel/ds.c

+3 −1
Original line number Diff line number Diff line
@@ -2303,8 +2303,10 @@ void __init intel_ds_init(void) 
			x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME;

			break;



		case 4:

		case 5:

			x86_pmu.pebs_ept = 1;

			fallthrough;

		case 4:

			x86_pmu.drain_pebs = intel_pmu_drain_pebs_icl;

			x86_pmu.pebs_record_size = sizeof(struct pebs_basic);

			if (x86_pmu.intel_cap.pebs_baseline) {

arch/x86/include/asm/kvm_host.h

+14 −1
Original line number Diff line number Diff line
@@ -514,6 +514,7 @@ struct kvm_pmc { 
#define MSR_ARCH_PERFMON_PERFCTR_MAX	(MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)

#define MSR_ARCH_PERFMON_EVENTSEL_MAX	(MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)

#define KVM_PMC_MAX_FIXED	3

#define MSR_ARCH_PERFMON_FIXED_CTR_MAX	(MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)

#define KVM_AMD_PMC_MAX_GENERIC	6

struct kvm_pmu {

	unsigned nr_arch_gp_counters;
@@ -1151,6 +1152,18 @@ struct kvm_x86_msr_filter { 
	struct msr_bitmap_range ranges[16];

};



struct kvm_x86_pmu_event_filter {

	__u32 action;

	__u32 nevents;

	__u32 fixed_counter_bitmap;

	__u32 flags;

	__u32 nr_includes;

	__u32 nr_excludes;

	__u64 *includes;

	__u64 *excludes;

	__u64 events[];

};



enum kvm_apicv_inhibit {



	/********************************************************************/
@@ -1368,7 +1381,7 @@ struct kvm_arch { 
	/* Guest can access the SGX PROVISIONKEY. */

	bool sgx_provisioning_allowed;



	struct kvm_pmu_event_filter __rcu *pmu_event_filter;

	struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;

	struct task_struct *nx_huge_page_recovery_thread;



#ifdef CONFIG_X86_64

arch/x86/include/uapi/asm/kvm.h

+29 −0
Original line number Diff line number Diff line
@@ -526,6 +526,35 @@ struct kvm_pmu_event_filter { 
#define KVM_PMU_EVENT_ALLOW 0

#define KVM_PMU_EVENT_DENY 1



#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0)

#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)



/*

 * Masked event layout.

 * Bits   Description

 * ----   -----------

 * 7:0    event select (low bits)

 * 15:8   umask match

 * 31:16  unused

 * 35:32  event select (high bits)

 * 36:54  unused

 * 55     exclude bit

 * 63:56  umask mask

 */



#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \

	(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \

	(((mask) & 0xFFULL) << 56) | \

	(((match) & 0xFFULL) << 8) | \

	((__u64)(!!(exclude)) << 55))



#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \

	(GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32))

#define KVM_PMU_MASKED_ENTRY_UMASK_MASK		(GENMASK_ULL(63, 56))

#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH	(GENMASK_ULL(15, 8))

#define KVM_PMU_MASKED_ENTRY_EXCLUDE		(BIT_ULL(55))

#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT	(56)



/* for KVM_{GET,SET,HAS}_DEVICE_ATTR */

#define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */

#define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */