Commit 1613c5fd authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: drop UBWC configuration 



As the DPU driver has switched to fetching data from MDSS driver, we can
now drop the UBWC and highest_bank_bit parts of the DPU hw catalog.

Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/550058/
Link: https://lore.kernel.org/r/20230728213320.97309-7-dmitry.baryshkov@linaro.org
parent a2e87e9e

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

+0 −6
Original line number Diff line number Diff line
@@ -21,11 +21,6 @@ static const struct dpu_caps msm8998_dpu_caps = { 
	.max_vdeci_exp = MAX_VERT_DECIMATION,

};



static const struct dpu_ubwc_cfg msm8998_ubwc_cfg = {

	.ubwc_version = DPU_HW_UBWC_VER_10,

	.highest_bank_bit = 0x2,

};



static const struct dpu_mdp_cfg msm8998_mdp = {

	.name = "top_0",

	.base = 0x0, .len = 0x458,
@@ -323,7 +318,6 @@ static const struct dpu_mdss_version msm8998_mdss_ver = { 
const struct dpu_mdss_cfg dpu_msm8998_cfg = {

	.mdss_ver = &msm8998_mdss_ver,

	.caps = &msm8998_dpu_caps,

	.ubwc = &msm8998_ubwc_cfg,

	.mdp = &msm8998_mdp,

	.ctl_count = ARRAY_SIZE(msm8998_ctl),

	.ctl = msm8998_ctl,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h

+0 −6
Original line number Diff line number Diff line
@@ -21,11 +21,6 @@ static const struct dpu_caps sdm845_dpu_caps = { 
	.max_vdeci_exp = MAX_VERT_DECIMATION,

};



static const struct dpu_ubwc_cfg sdm845_ubwc_cfg = {

	.ubwc_version = DPU_HW_UBWC_VER_20,

	.highest_bank_bit = 0x2,

};



static const struct dpu_mdp_cfg sdm845_mdp = {

	.name = "top_0",

	.base = 0x0, .len = 0x45c,
@@ -340,7 +335,6 @@ static const struct dpu_mdss_version sdm845_mdss_ver = { 
const struct dpu_mdss_cfg dpu_sdm845_cfg = {

	.mdss_ver = &sdm845_mdss_ver,

	.caps = &sdm845_dpu_caps,

	.ubwc = &sdm845_ubwc_cfg,

	.mdp = &sdm845_mdp,

	.ctl_count = ARRAY_SIZE(sdm845_ctl),

	.ctl = sdm845_ctl,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

+0 −6
Original line number Diff line number Diff line
@@ -21,11 +21,6 @@ static const struct dpu_caps sm8150_dpu_caps = { 
	.max_vdeci_exp = MAX_VERT_DECIMATION,

};



static const struct dpu_ubwc_cfg sm8150_ubwc_cfg = {

	.ubwc_version = DPU_HW_UBWC_VER_30,

	.highest_bank_bit = 0x2,

};



static const struct dpu_mdp_cfg sm8150_mdp = {

	.name = "top_0",

	.base = 0x0, .len = 0x45c,
@@ -383,7 +378,6 @@ static const struct dpu_mdss_version sm8150_mdss_ver = { 
const struct dpu_mdss_cfg dpu_sm8150_cfg = {

	.mdss_ver = &sm8150_mdss_ver,

	.caps = &sm8150_dpu_caps,

	.ubwc = &sm8150_ubwc_cfg,

	.mdp = &sm8150_mdp,

	.ctl_count = ARRAY_SIZE(sm8150_ctl),

	.ctl = sm8150_ctl,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h

+0 −6
Original line number Diff line number Diff line
@@ -21,11 +21,6 @@ static const struct dpu_caps sc8180x_dpu_caps = { 
	.max_vdeci_exp = MAX_VERT_DECIMATION,

};



static const struct dpu_ubwc_cfg sc8180x_ubwc_cfg = {

	.ubwc_version = DPU_HW_UBWC_VER_30,

	.highest_bank_bit = 0x3,

};



static const struct dpu_mdp_cfg sc8180x_mdp = {

	.name = "top_0",

	.base = 0x0, .len = 0x45c,
@@ -410,7 +405,6 @@ static const struct dpu_mdss_version sc8180x_mdss_ver = { 
const struct dpu_mdss_cfg dpu_sc8180x_cfg = {

	.mdss_ver = &sc8180x_mdss_ver,

	.caps = &sc8180x_dpu_caps,

	.ubwc = &sc8180x_ubwc_cfg,

	.mdp = &sc8180x_mdp,

	.ctl_count = ARRAY_SIZE(sc8180x_ctl),

	.ctl = sc8180x_ctl,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h

+0 −7
Original line number Diff line number Diff line
@@ -19,12 +19,6 @@ static const struct dpu_caps sm6125_dpu_caps = { 
	.max_vdeci_exp = MAX_VERT_DECIMATION,

};



static const struct dpu_ubwc_cfg sm6125_ubwc_cfg = {

	.ubwc_version = DPU_HW_UBWC_VER_10,

	.highest_bank_bit = 0x1,

	.ubwc_swizzle = 0x1,

};



static const struct dpu_mdp_cfg sm6125_mdp = {

	.name = "top_0",

	.base = 0x0, .len = 0x45c,
@@ -208,7 +202,6 @@ static const struct dpu_mdss_version sm6125_mdss_ver = { 
const struct dpu_mdss_cfg dpu_sm6125_cfg = {

	.mdss_ver = &sm6125_mdss_ver,

	.caps = &sm6125_dpu_caps,

	.ubwc = &sm6125_ubwc_cfg,

	.mdp = &sm6125_mdp,

	.ctl_count = ARRAY_SIZE(sm6125_ctl),

	.ctl = sm6125_ctl,