drm/amd/powerplay: fix sw SMU wrong UVD/VCE powergate setting

The UVD/VCE bits are set wrongly. This causes the UVD/VCE clocks
are not brought back correctly on needed.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>