Commit 194a8352 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Thomas Bogendoerfer
Browse files

MIPS: Loongson: Move arch cflags to MIPS top level Makefile 



Arch cflags should be independent to Platform.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent b6007ff8

arch/mips/Makefile

+38 −0
Original line number Diff line number Diff line
@@ -181,9 +181,47 @@ endif 
cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1

cflags-$(CONFIG_CPU_BMIPS)	+= -march=mips32 -Wa,-mips32 -Wa,--trap



cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f -Wa,--trap

# Some -march= flags enable MMI instructions, and GCC complains about that

# support being enabled alongside -msoft-float. Thus explicitly disable MMI.

cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc-option,-mno-loongson-mmi)

ifdef CONFIG_CPU_LOONGSON64

cflags-$(CONFIG_CPU_LOONGSON64)	+= -Wa,--trap

cflags-$(CONFIG_CC_IS_GCC) += -march=loongson3a

cflags-$(CONFIG_CC_IS_CLANG) += -march=mips64r2

endif

cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-option,-mno-loongson-mmi)



cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)

cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)

cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS)	+= $(call cc-option,-mno-daddi,)

ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS

cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop

cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump

endif



#

# Some versions of binutils, not currently mainline as of 2019/02/04, support

# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction

# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a

# description).

#

# We disable this in order to prevent the assembler meddling with the

# instruction that labels refer to, ie. if we label an ll instruction:

#

# 1: ll v0, 0(a0)

#

# ...then with the assembler fix applied the label may actually point at a sync

# instruction inserted by the assembler, and if we were using the label in an

# exception table the table would no longer contain the address of the ll

# instruction.

#

# Avoid this by explicitly disabling that assembler behaviour. If upstream

# binutils does not merge support for the flag then we can revisit & remove

# this later - for now it ensures vendor toolchains don't cause problems.

#

cflags-$(CONFIG_CPU_LOONGSON64)	+= $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)



# For smartmips configurations, there are hundreds of warnings due to ISA overrides

# in assembly and header files. smartmips is only supported for MIPS32r1 onwards

arch/mips/loongson2ef/Platform

+0 −35
Original line number Diff line number Diff line
@@ -2,41 +2,6 @@ 
# Loongson Processors' Support

#



cflags-$(CONFIG_CPU_LOONGSON2EF)	+= -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e

cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f

#

# Some versions of binutils, not currently mainline as of 2019/02/04, support

# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction

# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a

# description).

#

# We disable this in order to prevent the assembler meddling with the

# instruction that labels refer to, ie. if we label an ll instruction:

#

# 1: ll v0, 0(a0)

#

# ...then with the assembler fix applied the label may actually point at a sync

# instruction inserted by the assembler, and if we were using the label in an

# exception table the table would no longer contain the address of the ll

# instruction.

#

# Avoid this by explicitly disabling that assembler behaviour. If upstream

# binutils does not merge support for the flag then we can revisit & remove

# this later - for now it ensures vendor toolchains don't cause problems.

#

cflags-$(CONFIG_CPU_LOONGSON2EF)	+= $(call cc-option,-Wa$(comma)-mno-fix-loongson3-llsc,)



# Enable the workarounds for Loongson2f

ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS

cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop

cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump

endif



# Some -march= flags enable MMI instructions, and GCC complains about that

# support being enabled alongside -msoft-float. Thus explicitly disable MMI.

cflags-y += $(call cc-option,-mno-loongson-mmi)



#

# Loongson Machines' Support

#

arch/mips/loongson64/Platform

+0 −16
Original line number Diff line number Diff line 
#

# Loongson Processors' Support

#





cflags-$(CONFIG_CPU_LOONGSON64)	+= -Wa,--trap



ifdef CONFIG_CPU_LOONGSON64

cflags-$(CONFIG_CC_IS_GCC) += -march=loongson3a

cflags-$(CONFIG_CC_IS_CLANG) += -march=mips64r2

endif



# Some -march= flags enable MMI instructions, and GCC complains about that

# support being enabled alongside -msoft-float. Thus explicitly disable MMI.

cflags-y += $(call cc-option,-mno-loongson-mmi)



#

# Loongson Machines' Support

#