Commit 1ba0a3bb authored by Yassine Oudjana's avatar Yassine Oudjana Committed by Bjorn Andersson
Browse files

clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX 



The parent at this index is the secondary mux, which can connect
not only to primary PLL/2 but also to XO. Rename the index to SMUX_INDEX
to better reflect the parent.

Signed-off-by: default avatarYassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220621160621.24415-2-y.oudjana@protonmail.com
parent 94a70c87

drivers/clk/qcom/clk-cpu-8996.c

+2 −2
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ 
#include "clk-regmap.h"



enum _pmux_input {

	DIV_2_INDEX = 0,

	SMUX_INDEX = 0,

	PLL_INDEX,

	ACD_INDEX,

	ALT_INDEX,
@@ -468,7 +468,7 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, 
	case POST_RATE_CHANGE:

		if (cnd->new_rate < DIV_2_THRESHOLD)

			ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,

							  DIV_2_INDEX);

							  SMUX_INDEX);

		else

			ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw,

							  ACD_INDEX);