mmc: sdhci-esdhc-imx: separate 100/200 MHz pinctrl states check

As indicated by function esdhc_change_pinstate(), SDR50 and DDR50
require pins_100mhz, while SDR104 and HS400 require pins_200mhz.  Some
system design may support SDR50 and DDR50 with 100mhz pin state only
(without 200mhz one).  Currently the combined 100/200 MHz pinctrl state
check prevents such system from running SDR50 and DDR50.  Separate the
check to support such system design.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/20210326110214.28416-1-shawnguo@kernel.org


Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>