Skip to content
Commit 29608651 authored by Jon Derrick's avatar Jon Derrick Committed by Lorenzo Pieralisi
Browse files

PCI: pci-bridge-emul: Update for PCIe 5.0 r1.0

Add missing bits from PCIe 4.0 and updates for PCIe 5.0 r1.0.

PCIe 4.0:
Device Status bit 6 - W1C - Emergency Power Reduction Detected
Link Control bits 15:14 - RW - DRS Signaling Control
Slot Control bit 13 - RW - Auto Slow Power Limit Disable

PCIe 5.0:
Slot Control bit 14 - RW - In-Band PD Disable

Link: https://lore.kernel.org/r/20200511162117.6674-4-jonathan.derrick@intel.com


Signed-off-by: default avatarJon Derrick <jonathan.derrick@intel.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent f61959b6
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment