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Commit 2cc78838 authored by Vignesh R's avatar Vignesh R Committed by Boris Brezillon
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mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller



Cadence OSPI controller IP supports Octal IO (x8 IO lines),
It also has an integrated PHY. IP register layout is very
similar to existing QSPI IP except for additional bits to support Octal
and Octal DDR mode. Therefore, extend current driver to support Octal
mode. Only Octal SDR read (1-1-8)mode is supported for now.

Tested with mt35xu512aba Octal flash on TI's AM654 EVM.

Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
parent 70b64604
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