Unverified Commit 2e0f3acb authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-arm64-for-6.3' of...

Merge tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 Devicetree updates for v6.3

This introduces support for the new Snapdragon 8 Gen 2 (SM8550)
platform.  In addition to the adding support for the MTP on this
platform, support the following devices is introduced:
 - GPLUS FL8005A
 - Google Zombie with LTE and NVMe
 - Google Zombie with NVMe
 - Lenovo Tab P11
 - Motorola G5 Plus
 - Motorola G7 Power
 - Motorola Moto G6
 - Samsung Galaxy J5 (2016)
 - Samsung Galaxy Tab A 8.0
 - Samsung Galaxy Tab A 9.7
 - Xiaomi Mi A1
 - Xiaomi Mi A2 Lite
 - Xiaomi Redmi 5 Plus
 - Xiaomi Redmi Note 4X

On IPQ8074 the PCIe PHY register regions and PHY clock names are
corrected.

On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is
unconditionally enabled. Per-sensor calibration data is provided for the
thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and
gains support for touchscreen and flash LED. An additional Samsung
Galaxy J5 variant is added, and support is added for hall sensor and
MUIC.

Per-sensor calibration information is introduced for the thermal sensor
on MSM8956 as well.

On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a
carveout is added to get modem metadata out of System RAM. Missing bus
clocks are added for agnoc2.
SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to
high-speed, to make USB work.

MSM8998 gains the same modem carveout as other platforms, and the
description of the clock hierarchy is improved.

On QCS404 the clock hierarchy description is improved, the CDSP PAS node
is adjusted to match the binding and the thermal sensor (tsens) gains
per-sensor calibration information.

On SC7180 the Data Capture and Compare block is intorduced, and a
carveout for the modem metadata is introduced, to get this out of System
RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is
adjusted for the Trogdor eDP and touchscreen.
Data lane and frequency properties are introduced for the DisplayPort
links.

SC7280 also gets Data Capture and Compare support, as well as the
dedicated modem metadata region. Herobrine gains DP audio support.
IPA description is updated so that it's only active on boards with a
modem.

On SC8280XP the display subsystem is introduced, currently with support
for most of the DisplayPort controllers. GPR, SoundWire and LPASS is
introduced, for audio support. Missing I2C and SPI controllers are
introduced.
Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and
the SA8295P ADP automotive board. The SA8540P Ride platform enables one
i2c and pcie controllers.
A CMA region is defined for the CRD and X13s, to avoid allocation issues
from the NVMe support.

Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains
a description of simplefb.
SDM670 gains QFPROM definition.

SDM845 gains a carveout for the modem metadata and support for the Data
Capture and Compare block is introduced.  Lenovo Yoga C630 firmware
paths are aligned with all other Qualcomm platforms.

On SM6125 apss SMMU is introduced and streams are defined for USB and
SDHCI controllers. GPI DMA description is introduced, as well as missing
SPI and I2C serial engines.
On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is
introduced, and I2C and related GPI DMA blocks are enabled.

On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on
CPUfreq.

Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is
enabled as well.

On SM8150 the display subsystem is introduced, with clock controller,
DPU and two DSI controllers. The Data Capture and Compare block is
introduced.
For the Sony Xperia Kumano platform, GPIO keys and NFC support is
introduced.

For SM8350 PCIe is introduced, as is the display subsystem with display
clock controller, DPU and two DSI controllers. #interconnect-cells is
changed to 2, to align with other platforms and allow for active-only
votes. The display is enabled and the LT9611uxc found on the SM8350
Hardware Development Kit board is described, to provide HDMI output.

On SM8450 the display subsystem is introduced, with DPU and two DSI
controllers.  GIC-ITS support is introduced for both PCIe0 and PCIe1.
SPMI bus support is introduced and pmics are wired up across the various
devices.
The display subsystem is enabled and the LT9611uxc is described to
provide HDMI output on the SM8450 Hardware Development Kit.
On Sony Xperia Nagara platform, GPIO keys and GPIO line names are
introduced. As is the SLG51000 PMIC and camera regulators are defined.

Support for SM8550 is introduced, with support for storage, USB,
remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These
blocks are enabled on the MTP.

Lastly, the work continue to align Devicetree source with bindings
across all platforms.

* tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (320 commits)
  arm64: dts: qcom: sc7280: Add a carveout for modem metadata
  arm64: dts: qcom: sc7180: Add a carveout for modem metadata
  arm64: dts: qcom: sdm845: Add a carveout for modem metadata
  arm64: dts: qcom: msm8998: Add a carveout for modem metadata
  arm64: dts: qcom: msm8996: Add a carveout for modem metadata
  arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names
  arm64: dts: qcom: ipq8074: fix Gen3 PCIe node
  arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed
  arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges
  arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY
  arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY
  arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers
  arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input
  arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller
  arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes
  arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes
  arm64: dts: qcom: sm8250: drop unused properties from tx-macro
  arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macro
  arm64: dts: qcom: align OPP table node name with DT schema
  arm64: dts: qcom: rename mdp nodes to display-controller
  ...

Link: https://lore.kernel.org/r/20230126202528.3691539-1-andersson@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b453988c a63a420d
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Display Clock & Reset Controller for SM8550

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
  - Neil Armstrong <neil.armstrong@linaro.org>

description: |
  Qualcomm display clock control module provides the clocks, resets and power
  domains on SM8550.

  See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h

properties:
  compatible:
    enum:
      - qcom,sm8550-dispcc

  clocks:
    items:
      - description: Board XO source
      - description: Board Always On XO source
      - description: Display's AHB clock
      - description: sleep clock
      - description: Byte clock from DSI PHY0
      - description: Pixel clock from DSI PHY0
      - description: Byte clock from DSI PHY1
      - description: Pixel clock from DSI PHY1
      - description: Link clock from DP PHY0
      - description: VCO DIV clock from DP PHY0
      - description: Link clock from DP PHY1
      - description: VCO DIV clock from DP PHY1
      - description: Link clock from DP PHY2
      - description: VCO DIV clock from DP PHY2
      - description: Link clock from DP PHY3
      - description: VCO DIV clock from DP PHY3

  '#clock-cells':
    const: 1

  '#reset-cells':
    const: 1

  '#power-domain-cells':
    const: 1

  reg:
    maxItems: 1

  power-domains:
    description:
      A phandle and PM domain specifier for the MMCX power domain.
    maxItems: 1

  required-opps:
    description:
      A phandle to an OPP node describing required MMCX performance point.
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - '#clock-cells'
  - '#reset-cells'
  - '#power-domain-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,sm8550-gcc.h>
    #include <dt-bindings/clock/qcom,rpmh.h>
    #include <dt-bindings/power/qcom-rpmpd.h>
    clock-controller@af00000 {
      compatible = "qcom,sm8550-dispcc";
      reg = <0x0af00000 0x10000>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&rpmhcc RPMH_CXO_CLK_A>,
               <&gcc GCC_DISP_AHB_CLK>,
               <&sleep_clk>,
               <&dsi0_phy 0>,
               <&dsi0_phy 1>,
               <&dsi1_phy 0>,
               <&dsi1_phy 1>,
               <&dp0_phy 0>,
               <&dp0_phy 1>,
               <&dp1_phy 0>,
               <&dp1_phy 1>,
               <&dp2_phy 0>,
               <&dp2_phy 1>,
               <&dp3_phy 0>,
               <&dp3_phy 1>;
      #clock-cells = <1>;
      #reset-cells = <1>;
      #power-domain-cells = <1>;
      power-domains = <&rpmhpd SM8550_MMCX>;
      required-opps = <&rpmhpd_opp_low_svs>;
    };
...
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm TCSR Clock Controller on SM8550

maintainers:
  - Bjorn Andersson <andersson@kernel.org>

description: |
  Qualcomm TCSR clock control module provides the clocks, resets and
  power domains on SM8550

  See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h

properties:
  compatible:
    items:
      - const: qcom,sm8550-tcsr
      - const: syscon

  clocks:
    items:
      - description: TCXO pad clock

  reg:
    maxItems: 1

  '#clock-cells':
    const: 1

  '#reset-cells':
    const: 1

required:
  - compatible
  - clocks

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>

    clock-controller@1fc0000 {
      compatible = "qcom,sm8550-tcsr", "syscon";
      reg = <0x1fc0000 0x30000>;
      clocks = <&rpmhcc RPMH_CXO_CLK>;
      #clock-cells = <1>;
      #reset-cells = <1>;
    };

...
+139 −0
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550

maintainers:
  - Abel Vesa <abel.vesa@linaro.org>
  - Neil Armstrong <neil.armstrong@linaro.org>

description: |
  RPMh interconnect providers support system bandwidth requirements through
  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
  able to communicate with the BCM through the Resource State Coordinator (RSC)
  associated with each execution environment. Provider nodes must point to at
  least one RPMh device child node pertaining to their RSC and each provider
  can map to multiple RPMh resources.

  See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h

properties:
  compatible:
    enum:
      - qcom,sm8550-aggre1-noc
      - qcom,sm8550-aggre2-noc
      - qcom,sm8550-clk-virt
      - qcom,sm8550-cnoc-main
      - qcom,sm8550-config-noc
      - qcom,sm8550-gem-noc
      - qcom,sm8550-lpass-ag-noc
      - qcom,sm8550-lpass-lpiaon-noc
      - qcom,sm8550-lpass-lpicx-noc
      - qcom,sm8550-mc-virt
      - qcom,sm8550-mmss-noc
      - qcom,sm8550-nsp-noc
      - qcom,sm8550-pcie-anoc
      - qcom,sm8550-system-noc

  reg:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 2

allOf:
  - $ref: qcom,rpmh-common.yaml#
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-clk-virt
              - qcom,sm8550-mc-virt
    then:
      properties:
        reg: false
    else:
      required:
        - reg

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-pcie-anoc
    then:
      properties:
        clocks:
          items:
            - description: aggre-NOC PCIe AXI clock
            - description: cfg-NOC PCIe a-NOC AHB clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-aggre1-noc
    then:
      properties:
        clocks:
          items:
            - description: aggre UFS PHY AXI clock
            - description: aggre USB3 PRIM AXI clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-aggre2-noc
    then:
      properties:
        clocks:
          items:
            - description: RPMH CC IPA clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm8550-aggre1-noc
              - qcom,sm8550-aggre2-noc
              - qcom,sm8550-pcie-anoc
    then:
      required:
        - clocks
    else:
      properties:
        clocks: false

required:
  - compatible

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,sm8550-gcc.h>

    clk_virt: interconnect-0 {
      compatible = "qcom,sm8550-clk-virt";
      #interconnect-cells = <2>;
      qcom,bcm-voters = <&apps_bcm_voter>;
    };

    aggre1_noc: interconnect@16e0000 {
      compatible = "qcom,sm8550-aggre1-noc";
      reg = <0x016e0000 0x14400>;
      #interconnect-cells = <2>;
      clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
               <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
      qcom,bcm-voters = <&apps_bcm_voter>;
    };
+15 −0
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@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-acer-a1-724.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-alcatel-idol347.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-asus-z00l.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-gplus-fl8005a.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-huawei-g7.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-longcheer-l8150.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-longcheer-l8910.dtb
@@ -19,9 +20,17 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-e5.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-e7.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-grandmax.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-gt510.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-gt58.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-j5.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-j5x.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-samsung-serranove.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-wingtech-wt88047.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-motorola-potter.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-daisy.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-mido.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-tissot.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-vince.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8956-sony-xperia-loire-kugo.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8956-sony-xperia-loire-suzu.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= msm8992-lg-bullhead-rev-10.dtb
@@ -122,17 +131,21 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r1.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-villager-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-zombie.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-zombie-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-zombie-nvme.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-zombie-nvme-lte.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd-r3.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-lenovo-thinkpad-x13s.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sda660-inforce-ifc6560.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm450-motorola-ali.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-pioneer.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-voyager.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm632-fairphone-fp3.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm632-motorola-ocean.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm636-sony-xperia-ganges-mermaid.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm660-xiaomi-lavender.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm670-google-sargo.dtb
@@ -157,6 +170,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm6375-sony-xperia-murray-pdx225.dtb
@@ -179,3 +193,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-sony-xperia-nagara-pdx223.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-sony-xperia-nagara-pdx224.dtb
dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-mtp.dtb
+0 −4
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@@ -169,10 +169,6 @@ led@6 {
	};
};

&blsp_dma {
	status = "okay";
};

&blsp_i2c2 {
	/* On Low speed expansion */
	status = "okay";
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