Unverified Commit b453988c authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-dt-for-v6.3-mw0' of...

Merge tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into arm/dt

RISC-V Devicetrees for v6.3-mw0

Microchip:
A vendor prefix for Aldec and both a binding and Devicetree for the
Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to
what they are shipping in the SDK for rev2 boards.

StarFive:
Just the binding for the new StarFive JH7110 SoC and its first-party
SDC the VisionFive 2.

Other:
I was expecting the Devicetree for the aforementioned board to be ready
for this window, as the pinctrl driver had seem some review prior to
v6.2 and both it & the base clock drivers are heavily based on the
existing drivers for the JH7110.
That didn't come to be.. Christmas, the RISC-V Summit in December and
the Lunar New Year all playing a part perhaps.
Because of that, both Palmer and I have the Kconfig.socs work in our
branches, although in hindsight it probably wasn't needed here as I
only added the TySoM Devicetree & the conflict would've been trivial.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: microchip: add the Aldec TySoM's devicetree
  dt-bindings: riscv: microchip: document the Aldec TySoM
  dt-bindings: vendor-prefixes: Add entry for Aldec
  RISC-V: stop directly selecting drivers for SOC_CANAAN
  RISC-V: stop selecting SiFive clock and serial drivers directly
  RISC-V: stop selecting the PolarFire SoC clock driver
  RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
  RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
  dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board

Link: https://lore.kernel.org/r/Y9LP+Za1h0fkBa58@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents be836a16 d9c36d01
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ properties:

      - items:
          - enum:
              - aldec,tysom-m-mpfs250t-rev2
              - aries,m100pfsevp
              - microchip,mpfs-sev-kit
              - sundance,polarberry
+6 −0
Original line number Diff line number Diff line
@@ -24,6 +24,12 @@ properties:
              - starfive,visionfive-v1
          - const: starfive,jh7100

      - items:
          - enum:
              - starfive,visionfive-2-va
              - starfive,visionfive-2-vb
          - const: starfive,jh7110

additionalProperties: true

...
+2 −0
Original line number Diff line number Diff line
@@ -69,6 +69,8 @@ patternProperties:
    description: Annapurna Labs
  "^alcatel,.*":
    description: Alcatel
  "^aldec,.*":
    description: Aldec, Inc.
  "^alfa-network,.*":
    description: ALFA Network Inc.
  "^allegro,.*":
+26 −13
Original line number Diff line number Diff line
menu "SoC selection"

config ARCH_MICROCHIP_POLARFIRE
	def_bool SOC_MICROCHIP_POLARFIRE

config SOC_MICROCHIP_POLARFIRE
	bool "Microchip PolarFire SoCs"
	select MCHP_CLK_MPFS
	help
	  This enables support for Microchip PolarFire SoC platforms.

@@ -11,16 +13,18 @@ config ARCH_RENESAS
	help
	  This enables support for the RISC-V based Renesas SoCs.

config ARCH_SIFIVE
	def_bool SOC_SIFIVE

config SOC_SIFIVE
	bool "SiFive SoCs"
	select SERIAL_SIFIVE if TTY
	select SERIAL_SIFIVE_CONSOLE if TTY
	select CLK_SIFIVE
	select CLK_SIFIVE_PRCI
	select ERRATA_SIFIVE if !XIP_KERNEL
	help
	  This enables support for SiFive SoC platform hardware.

config ARCH_STARFIVE
	def_bool SOC_STARFIVE

config SOC_STARFIVE
	bool "StarFive SoCs"
	select PINCTRL
@@ -28,6 +32,9 @@ config SOC_STARFIVE
	help
	  This enables support for StarFive SoC platform hardware.

config ARCH_VIRT
	def_bool SOC_VIRT
	
config SOC_VIRT
	bool "QEMU Virt Machine"
	select CLINT_TIMER if RISCV_M_MODE
@@ -42,24 +49,27 @@ config SOC_VIRT
	help
	  This enables support for QEMU Virt Machine.

config ARCH_CANAAN
	def_bool SOC_CANAAN

config SOC_CANAAN
	bool "Canaan Kendryte K210 SoC"
	depends on !MMU
	select CLINT_TIMER if RISCV_M_MODE
	select SERIAL_SIFIVE if TTY
	select SERIAL_SIFIVE_CONSOLE if TTY
	select ARCH_HAS_RESET_CONTROLLER
	select PINCTRL
	select COMMON_CLK
	select COMMON_CLK_K210
	help
	  This enables support for Canaan Kendryte K210 SoC platform hardware.

if SOC_CANAAN
if ARCH_CANAAN

config ARCH_CANAAN_K210_DTB_BUILTIN
	def_bool SOC_CANAAN_K210_DTB_BUILTIN

config SOC_CANAAN_K210_DTB_BUILTIN
	bool "Builtin device tree for the Canaan Kendryte K210"
	depends on SOC_CANAAN
	depends on ARCH_CANAAN
	default y
	select OF
	select BUILTIN_DTB
@@ -68,16 +78,19 @@ config SOC_CANAAN_K210_DTB_BUILTIN
	  This option should be selected if no bootloader is being used.
	  If unsure, say Y.

config ARCH_CANAAN_K210_DTB_SOURCE
	def_bool SOC_CANAAN_K210_DTB_SOURCE

config SOC_CANAAN_K210_DTB_SOURCE
	string "Source file for the Canaan Kendryte K210 builtin DTB"
	depends on SOC_CANAAN
	depends on SOC_CANAAN_K210_DTB_BUILTIN
	depends on ARCH_CANAAN
	depends on ARCH_CANAAN_K210_DTB_BUILTIN
	default "k210_generic"
	help
	  Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
	  for the DTS file that will be used to produce the DTB linked into the
	  kernel.

endif # SOC_CANAAN
endif # ARCH_CANAAN

endmenu # "SoC selection"
+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ endif
endif

ifneq ($(CONFIG_XIP_KERNEL),y)
ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
KBUILD_IMAGE := $(boot)/loader.bin
else
ifeq ($(CONFIG_EFI_ZBOOT),)
Loading