i2c: mlxcpld: Add support for extended transaction length

Add support for extended length of read and write transactions.
New FPGA logic allows to increase size of the read and write
transactions length. This feature is verified through capability
register 'CPBLTY_REG'. Two bits 5 and 6 of the register are used for
length capability detection. Value '10' indicates support of extended
transaction length - 128 bytes for read transactions and 132 for write
transactions.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>