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Unverified Commit 31564b8b authored by Kefeng Wang's avatar Kefeng Wang Committed by Palmer Dabbelt
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riscv: Add HAVE_IRQ_TIME_ACCOUNTING 



RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.

Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent da815582
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