Commit 39658cee authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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clk: renesas: r8a779g0: Add TPU clock 



Add the module clock used by the 16-Bit Timer Pulse Unit (TPU) on the
Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: default avatarStephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/f2c1e2c5411b7bd6af726e6baf6e1efc354a7cdf.1665147497.git.geert+renesas@glider.be
parent b00bf771

drivers/clk/renesas/r8a779g0-cpg-mssr.c

+1 −0
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { 
	DEF_MOD("scif4",	705,	R8A779G0_CLK_SASYNCPERD4),

	DEF_MOD("sydm0",	709,	R8A779G0_CLK_S0D6_PER),

	DEF_MOD("sydm1",	710,	R8A779G0_CLK_S0D6_PER),

	DEF_MOD("tpu0",		718,	R8A779G0_CLK_SASYNCPERD4),

	DEF_MOD("wdt1:wdt0",	907,	R8A779G0_CLK_R),

	DEF_MOD("pfc0",		915,	R8A779G0_CLK_CL16M),

	DEF_MOD("pfc1",		916,	R8A779G0_CLK_CL16M),